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Flip flop setup, hold & metastability explorer tool
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mattvenn/flipflop_demo
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Made for a video about flip flops:https://www.youtube.com/watch?v=5PRuPVIjEcs
For theZero to ASIC course
git clone https://github.com/mattvenn/flipflop_democd flipflop_demo/spicetar xf csv.tar.bz2./wave.pyYou will probably need to install therequirements
pip3 install -r spice/requirements.txtAfter install of openlane/pdk etc, copy this directory to $OPENLANE_ROOT/designs. Then:
cd $OPENLANE_ROOTmake mount./flow.tcl -design flipflop_demoThis will simulate moving a data pulse through the setup and hold times of a d type flop.
make setupmake sim
Takes about 8 mins on my laptop.
Schematic generated with schemdraw with thanks to Proppy.
The flip flop is one of the largest and most complexstandard cells. Here's theGDS layout:
- 26 fets, 13 CMOS pairs
- 7 inverters
- 2 tristate inverters
- 2 transmission gates
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Flip flop setup, hold & metastability explorer tool