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[NVPTX] Prevent fptrunc of v2f32 from being folded into store#149571
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[NVPTX] Prevent fptrunc of v2f32 from being folded into store#149571
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@llvm/pr-subscribers-backend-nvptx Author: Alex MacLean (AlexMaclean) ChangesFull diff:https://github.com/llvm/llvm-project/pull/149571.diff 2 Files Affected:
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cppindex 7aa06f9079b09..4e7002feea215 100644--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp@@ -731,6 +731,8 @@ NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM, setTruncStoreAction(MVT::f32, MVT::bf16, Expand); setTruncStoreAction(MVT::f64, MVT::bf16, Expand); setTruncStoreAction(MVT::f64, MVT::f32, Expand);+ setTruncStoreAction(MVT::v2f32, MVT::v2f16, Expand);+ setTruncStoreAction(MVT::v2f32, MVT::v2bf16, Expand); // PTX does not support load / store predicate registers setOperationAction(ISD::LOAD, MVT::i1, Custom);diff --git a/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll b/llvm/test/CodeGen/NVPTX/f32x2-instructions.llindex af3cb63082e78..f24428ebcfb8c 100644--- a/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll+++ b/llvm/test/CodeGen/NVPTX/f32x2-instructions.ll@@ -1957,6 +1957,41 @@ define <2 x float> @test_uitofp_2xi32_to_2xfloat(<2 x i32> %a) #0 { ret <2 x float> %r }+define void @test_trunc_to_v2bf16(<2 x float> %a, ptr %p) {+; CHECK-LABEL: test_trunc_to_v2bf16(+; CHECK: {+; CHECK-NEXT: .reg .b32 %r<4>;+; CHECK-NEXT: .reg .b64 %rd<3>;+; CHECK-EMPTY:+; CHECK-NEXT: // %bb.0:+; CHECK-NEXT: ld.param.b64 %rd2, [test_trunc_to_v2bf16_param_1];+; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_trunc_to_v2bf16_param_0];+; CHECK-NEXT: cvt.rn.bf16x2.f32 %r3, %r2, %r1;+; CHECK-NEXT: st.b32 [%rd2], %r3;+; CHECK-NEXT: ret;+ %trunc = fptrunc <2 x float> %a to <2 x bfloat>+ store <2 x bfloat> %trunc, ptr %p+ ret void+}++define void @test_trunc_to_v2f16(<2 x float> %a, ptr %p) {+; CHECK-LABEL: test_trunc_to_v2f16(+; CHECK: {+; CHECK-NEXT: .reg .b32 %r<4>;+; CHECK-NEXT: .reg .b64 %rd<3>;+; CHECK-EMPTY:+; CHECK-NEXT: // %bb.0:+; CHECK-NEXT: ld.param.b64 %rd2, [test_trunc_to_v2f16_param_1];+; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_trunc_to_v2f16_param_0];+; CHECK-NEXT: cvt.rn.f16x2.f32 %r3, %r2, %r1;+; CHECK-NEXT: st.b32 [%rd2], %r3;+; CHECK-NEXT: ret;+ %trunc = fptrunc <2 x float> %a to <2 x half>+ store <2 x half> %trunc, ptr %p+ ret void+}++ attributes #0 = { nounwind } attributes #1 = { "unsafe-fp-math" = "true" } attributes #2 = { "denormal-fp-math"="preserve-sign" } |
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thanks!
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LLVM Buildbot has detected a new failure on builder Full details are available at:https://lab.llvm.org/buildbot/#/builders/185/builds/22430 Here is the relevant piece of the build log for the reference
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LLVM Buildbot has detected a new failure on builder Full details are available at:https://lab.llvm.org/buildbot/#/builders/137/builds/22636 Here is the relevant piece of the build log for the reference
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LLVM Buildbot has detected a new failure on builder Full details are available at:https://lab.llvm.org/buildbot/#/builders/33/builds/20554 Here is the relevant piece of the build log for the reference
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LLVM Buildbot has detected a new failure on builder Full details are available at:https://lab.llvm.org/buildbot/#/builders/153/builds/38648 Here is the relevant piece of the build log for the reference
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