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[RISCV][IA] Always generate masked versions of segment LD/ST [nfc-ish]#148905
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Goal is to be able to eventually merge some of these code path. Havingthe mask operand should get dropped cleanly via pattern match.
@llvm/pr-subscribers-backend-risc-v Author: Philip Reames (preames) ChangesGoal is to be able to eventually merge some of these code path. Having the mask operand should get dropped cleanly via pattern match. Patch is 41.40 KiB, truncated to 20.00 KiB below, full version:https://github.com/llvm/llvm-project/pull/148905.diff 3 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cppindex 39603b92cc2f7..dabd4ae7b5ac4 100644--- a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp+++ b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp@@ -264,12 +264,6 @@ bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad( {ResVTy, PtrTy, XLenTy}, {LI->getPointerOperand(), Mask, VL}); } else {- static const Intrinsic::ID IntrIds[] = {- Intrinsic::riscv_vlseg2, Intrinsic::riscv_vlseg3,- Intrinsic::riscv_vlseg4, Intrinsic::riscv_vlseg5,- Intrinsic::riscv_vlseg6, Intrinsic::riscv_vlseg7,- Intrinsic::riscv_vlseg8};- unsigned SEW = DL.getTypeSizeInBits(ResVTy->getElementType()); unsigned NumElts = ResVTy->getElementCount().getKnownMinValue(); Type *VecTupTy = TargetExtType::get(@@ -277,13 +271,20 @@ bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad( ScalableVectorType::get(Type::getInt8Ty(LI->getContext()), NumElts * SEW / 8), Factor);- Value *VL = Constant::getAllOnesValue(XLenTy);+ Value *Mask = Builder.getAllOnesMask(ResVTy->getElementCount());++ Function *VlsegNFunc = Intrinsic::getOrInsertDeclaration(+ LI->getModule(), ScalableVlsegIntrIds[Factor - 2],+ {VecTupTy, PtrTy, Mask->getType(), VL->getType()});++ Value *Operands[] = {+ PoisonValue::get(VecTupTy), LI->getPointerOperand(), Mask, VL,+ ConstantInt::get(XLenTy,+ RISCVVType::TAIL_AGNOSTIC | RISCVVType::MASK_AGNOSTIC),+ ConstantInt::get(XLenTy, Log2_64(SEW))};- Value *Vlseg = Builder.CreateIntrinsic(- IntrIds[Factor - 2], {VecTupTy, PtrTy, XLenTy},- {PoisonValue::get(VecTupTy), LI->getPointerOperand(), VL,- ConstantInt::get(XLenTy, Log2_64(SEW))});+ CallInst *Vlseg = Builder.CreateCall(VlsegNFunc, Operands); SmallVector<Type *, 2> AggrTypes{Factor, ResVTy}; Return = PoisonValue::get(StructType::get(LI->getContext(), AggrTypes));@@ -338,12 +339,6 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( Builder.CreateCall(VssegNFunc, Ops); } else {- static const Intrinsic::ID IntrIds[] = {- Intrinsic::riscv_vsseg2, Intrinsic::riscv_vsseg3,- Intrinsic::riscv_vsseg4, Intrinsic::riscv_vsseg5,- Intrinsic::riscv_vsseg6, Intrinsic::riscv_vsseg7,- Intrinsic::riscv_vsseg8};- unsigned SEW = DL.getTypeSizeInBits(InVTy->getElementType()); unsigned NumElts = InVTy->getElementCount().getKnownMinValue(); Type *VecTupTy = TargetExtType::get(@@ -352,10 +347,8 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( NumElts * SEW / 8), Factor);- Function *VssegNFunc = Intrinsic::getOrInsertDeclaration(- SI->getModule(), IntrIds[Factor - 2], {VecTupTy, PtrTy, XLenTy});- Value *VL = Constant::getAllOnesValue(XLenTy);+ Value *Mask = Builder.getAllOnesMask(InVTy->getElementCount()); Value *StoredVal = PoisonValue::get(VecTupTy); for (unsigned i = 0; i < Factor; ++i)@@ -363,8 +356,15 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( Intrinsic::riscv_tuple_insert, {VecTupTy, InVTy}, {StoredVal, InterleaveValues[i], Builder.getInt32(i)});- Builder.CreateCall(VssegNFunc, {StoredVal, SI->getPointerOperand(), VL,- ConstantInt::get(XLenTy, Log2_64(SEW))});+ Function *VssegNFunc = Intrinsic::getOrInsertDeclaration(+ SI->getModule(), ScalableVssegIntrIds[Factor - 2],+ {VecTupTy, PtrTy, Mask->getType(), VL->getType()});++ Value *Operands[] = {StoredVal, SI->getPointerOperand(), Mask, VL,+ ConstantInt::get(XLenTy, Log2_64(SEW))};++ Builder.CreateCall(VssegNFunc, Operands);+ } return true;@@ -468,14 +468,12 @@ bool RISCVTargetLowering::lowerInterleavedVPLoad( NumElts * SEW / 8), Factor);- Value *PoisonVal = PoisonValue::get(VecTupTy);- Function *VlsegNFunc = Intrinsic::getOrInsertDeclaration( Load->getModule(), ScalableVlsegIntrIds[Factor - 2], {VecTupTy, PtrTy, Mask->getType(), EVL->getType()}); Value *Operands[] = {- PoisonVal,+ PoisonValue::get(VecTupTy), Load->getArgOperand(0), Mask, EVL,diff --git a/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll b/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.llindex 8d156cfd4e526..f8e4ce9548147 100644--- a/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll+++ b/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll@@ -20,7 +20,7 @@ define void @load_factor2(ptr addrspace(1) %ptr) { define void @load_factor2_vscale(ptr addrspace(1) %ptr) { ; CHECK-LABEL: define void @load_factor2_vscale( ; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) #[[ATTR0]] {-; CHECK-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr addrspace(1) [[PTR]], i64 -1, i64 5)+; CHECK-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p1.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr addrspace(1) [[PTR]], <vscale x 8 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; CHECK-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)diff --git a/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll b/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.llindex 72c1f22032bb7..672e94962da6d 100644--- a/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll+++ b/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll@@ -25,7 +25,7 @@ define void @load_factor2(ptr %ptr) { define void @load_factor2_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor2_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p0.i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p0.nxv8i1.i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], <vscale x 8 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)@@ -35,7 +35,7 @@ define void @load_factor2_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor2_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p0.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], <vscale x 8 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)@@ -75,7 +75,7 @@ define void @load_factor3(ptr %ptr) { define void @load_factor3_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor3_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv8i8_3t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv8i8_3t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 1)@@ -88,7 +88,7 @@ define void @load_factor3_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor3_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv8i8_3t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv8i8_3t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 1)@@ -135,7 +135,7 @@ define void @load_factor4(ptr %ptr) { define void @load_factor4_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor4_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.triscv.vector.tuple_nxv16i8_4t.p0.i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv4i1.i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], <vscale x 4 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } poison, <vscale x 4 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 1)@@ -151,7 +151,7 @@ define void @load_factor4_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor4_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.triscv.vector.tuple_nxv16i8_4t.p0.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], <vscale x 4 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } poison, <vscale x 4 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 1)@@ -205,7 +205,7 @@ define void @load_factor5(ptr %ptr) { define void @load_factor5_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor5_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.triscv.vector.tuple_nxv8i8_5t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv8i8_5t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 1)@@ -224,7 +224,7 @@ define void @load_factor5_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor5_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.triscv.vector.tuple_nxv8i8_5t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv8i8_5t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 1)@@ -285,7 +285,7 @@ define void @load_factor6(ptr %ptr) { define void @load_factor6_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor6_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.triscv.vector.tuple_nxv8i8_6t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv8i8_6t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 1)@@ -307,7 +307,7 @@ define void @load_factor6_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor6_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.triscv.vector.tuple_nxv8i8_6t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv8i8_6t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 1)@@ -375,7 +375,7 @@ define void @load_factor7(ptr %ptr) { define void @load_factor7_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor7_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.triscv.vector.tuple_nxv8i8_7t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP1]], i32 1)@@ -400,7 +400,7 @@ define void @load_factor7_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor7_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.triscv.vector.tuple_nxv8i8_7t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = ca...[truncated] |
@llvm/pr-subscribers-llvm-transforms Author: Philip Reames (preames) ChangesGoal is to be able to eventually merge some of these code path. Having the mask operand should get dropped cleanly via pattern match. Patch is 41.40 KiB, truncated to 20.00 KiB below, full version:https://github.com/llvm/llvm-project/pull/148905.diff 3 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cppindex 39603b92cc2f7..dabd4ae7b5ac4 100644--- a/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp+++ b/llvm/lib/Target/RISCV/RISCVInterleavedAccess.cpp@@ -264,12 +264,6 @@ bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad( {ResVTy, PtrTy, XLenTy}, {LI->getPointerOperand(), Mask, VL}); } else {- static const Intrinsic::ID IntrIds[] = {- Intrinsic::riscv_vlseg2, Intrinsic::riscv_vlseg3,- Intrinsic::riscv_vlseg4, Intrinsic::riscv_vlseg5,- Intrinsic::riscv_vlseg6, Intrinsic::riscv_vlseg7,- Intrinsic::riscv_vlseg8};- unsigned SEW = DL.getTypeSizeInBits(ResVTy->getElementType()); unsigned NumElts = ResVTy->getElementCount().getKnownMinValue(); Type *VecTupTy = TargetExtType::get(@@ -277,13 +271,20 @@ bool RISCVTargetLowering::lowerDeinterleaveIntrinsicToLoad( ScalableVectorType::get(Type::getInt8Ty(LI->getContext()), NumElts * SEW / 8), Factor);- Value *VL = Constant::getAllOnesValue(XLenTy);+ Value *Mask = Builder.getAllOnesMask(ResVTy->getElementCount());++ Function *VlsegNFunc = Intrinsic::getOrInsertDeclaration(+ LI->getModule(), ScalableVlsegIntrIds[Factor - 2],+ {VecTupTy, PtrTy, Mask->getType(), VL->getType()});++ Value *Operands[] = {+ PoisonValue::get(VecTupTy), LI->getPointerOperand(), Mask, VL,+ ConstantInt::get(XLenTy,+ RISCVVType::TAIL_AGNOSTIC | RISCVVType::MASK_AGNOSTIC),+ ConstantInt::get(XLenTy, Log2_64(SEW))};- Value *Vlseg = Builder.CreateIntrinsic(- IntrIds[Factor - 2], {VecTupTy, PtrTy, XLenTy},- {PoisonValue::get(VecTupTy), LI->getPointerOperand(), VL,- ConstantInt::get(XLenTy, Log2_64(SEW))});+ CallInst *Vlseg = Builder.CreateCall(VlsegNFunc, Operands); SmallVector<Type *, 2> AggrTypes{Factor, ResVTy}; Return = PoisonValue::get(StructType::get(LI->getContext(), AggrTypes));@@ -338,12 +339,6 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( Builder.CreateCall(VssegNFunc, Ops); } else {- static const Intrinsic::ID IntrIds[] = {- Intrinsic::riscv_vsseg2, Intrinsic::riscv_vsseg3,- Intrinsic::riscv_vsseg4, Intrinsic::riscv_vsseg5,- Intrinsic::riscv_vsseg6, Intrinsic::riscv_vsseg7,- Intrinsic::riscv_vsseg8};- unsigned SEW = DL.getTypeSizeInBits(InVTy->getElementType()); unsigned NumElts = InVTy->getElementCount().getKnownMinValue(); Type *VecTupTy = TargetExtType::get(@@ -352,10 +347,8 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( NumElts * SEW / 8), Factor);- Function *VssegNFunc = Intrinsic::getOrInsertDeclaration(- SI->getModule(), IntrIds[Factor - 2], {VecTupTy, PtrTy, XLenTy});- Value *VL = Constant::getAllOnesValue(XLenTy);+ Value *Mask = Builder.getAllOnesMask(InVTy->getElementCount()); Value *StoredVal = PoisonValue::get(VecTupTy); for (unsigned i = 0; i < Factor; ++i)@@ -363,8 +356,15 @@ bool RISCVTargetLowering::lowerInterleaveIntrinsicToStore( Intrinsic::riscv_tuple_insert, {VecTupTy, InVTy}, {StoredVal, InterleaveValues[i], Builder.getInt32(i)});- Builder.CreateCall(VssegNFunc, {StoredVal, SI->getPointerOperand(), VL,- ConstantInt::get(XLenTy, Log2_64(SEW))});+ Function *VssegNFunc = Intrinsic::getOrInsertDeclaration(+ SI->getModule(), ScalableVssegIntrIds[Factor - 2],+ {VecTupTy, PtrTy, Mask->getType(), VL->getType()});++ Value *Operands[] = {StoredVal, SI->getPointerOperand(), Mask, VL,+ ConstantInt::get(XLenTy, Log2_64(SEW))};++ Builder.CreateCall(VssegNFunc, Operands);+ } return true;@@ -468,14 +468,12 @@ bool RISCVTargetLowering::lowerInterleavedVPLoad( NumElts * SEW / 8), Factor);- Value *PoisonVal = PoisonValue::get(VecTupTy);- Function *VlsegNFunc = Intrinsic::getOrInsertDeclaration( Load->getModule(), ScalableVlsegIntrIds[Factor - 2], {VecTupTy, PtrTy, Mask->getType(), EVL->getType()}); Value *Operands[] = {- PoisonVal,+ PoisonValue::get(VecTupTy), Load->getArgOperand(0), Mask, EVL,diff --git a/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll b/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.llindex 8d156cfd4e526..f8e4ce9548147 100644--- a/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll+++ b/llvm/test/Transforms/InterleavedAccess/RISCV/addrspace.ll@@ -20,7 +20,7 @@ define void @load_factor2(ptr addrspace(1) %ptr) { define void @load_factor2_vscale(ptr addrspace(1) %ptr) { ; CHECK-LABEL: define void @load_factor2_vscale( ; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) #[[ATTR0]] {-; CHECK-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr addrspace(1) [[PTR]], i64 -1, i64 5)+; CHECK-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p1.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr addrspace(1) [[PTR]], <vscale x 8 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; CHECK-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)diff --git a/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll b/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.llindex 72c1f22032bb7..672e94962da6d 100644--- a/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll+++ b/llvm/test/Transforms/InterleavedAccess/RISCV/interleaved-accesses.ll@@ -25,7 +25,7 @@ define void @load_factor2(ptr %ptr) { define void @load_factor2_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor2_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p0.i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p0.nxv8i1.i32(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], <vscale x 8 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)@@ -35,7 +35,7 @@ define void @load_factor2_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor2_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.triscv.vector.tuple_nxv32i8_2t.p0.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 32 x i8>, 2) @llvm.riscv.vlseg2.mask.triscv.vector.tuple_nxv32i8_2t.p0.nxv8i1.i64(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) poison, ptr [[PTR:%.*]], <vscale x 8 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } poison, <vscale x 8 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 8 x i32> @llvm.riscv.tuple.extract.nxv8i32.triscv.vector.tuple_nxv32i8_2t(target("riscv.vector.tuple", <vscale x 32 x i8>, 2) [[TMP1]], i32 1)@@ -75,7 +75,7 @@ define void @load_factor3(ptr %ptr) { define void @load_factor3_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor3_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv8i8_3t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv8i8_3t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 1)@@ -88,7 +88,7 @@ define void @load_factor3_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor3_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.triscv.vector.tuple_nxv8i8_3t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 3) @llvm.riscv.vlseg3.mask.triscv.vector.tuple_nxv8i8_3t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_3t(target("riscv.vector.tuple", <vscale x 8 x i8>, 3) [[TMP1]], i32 1)@@ -135,7 +135,7 @@ define void @load_factor4(ptr %ptr) { define void @load_factor4_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor4_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.triscv.vector.tuple_nxv16i8_4t.p0.i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv4i1.i32(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], <vscale x 4 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } poison, <vscale x 4 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 1)@@ -151,7 +151,7 @@ define void @load_factor4_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor4_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.triscv.vector.tuple_nxv16i8_4t.p0.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 16 x i8>, 4) @llvm.riscv.vlseg4.mask.triscv.vector.tuple_nxv16i8_4t.p0.nxv4i1.i64(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) poison, ptr [[PTR:%.*]], <vscale x 4 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } poison, <vscale x 4 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i32> @llvm.riscv.tuple.extract.nxv4i32.triscv.vector.tuple_nxv16i8_4t(target("riscv.vector.tuple", <vscale x 16 x i8>, 4) [[TMP1]], i32 1)@@ -205,7 +205,7 @@ define void @load_factor5(ptr %ptr) { define void @load_factor5_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor5_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.triscv.vector.tuple_nxv8i8_5t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv8i8_5t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 1)@@ -224,7 +224,7 @@ define void @load_factor5_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor5_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.triscv.vector.tuple_nxv8i8_5t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 5) @llvm.riscv.vlseg5.mask.triscv.vector.tuple_nxv8i8_5t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_5t(target("riscv.vector.tuple", <vscale x 8 x i8>, 5) [[TMP1]], i32 1)@@ -285,7 +285,7 @@ define void @load_factor6(ptr %ptr) { define void @load_factor6_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor6_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.triscv.vector.tuple_nxv8i8_6t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv8i8_6t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 1)@@ -307,7 +307,7 @@ define void @load_factor6_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor6_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.triscv.vector.tuple_nxv8i8_6t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 6) @llvm.riscv.vlseg6.mask.triscv.vector.tuple_nxv8i8_6t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 0) ; RV64-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV64-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_6t(target("riscv.vector.tuple", <vscale x 8 x i8>, 6) [[TMP1]], i32 1)@@ -375,7 +375,7 @@ define void @load_factor7(ptr %ptr) { define void @load_factor7_vscale(ptr %ptr) { ; RV32-LABEL: @load_factor7_vscale(-; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.triscv.vector.tuple_nxv8i8_7t.p0.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], i32 -1, i32 5)+; RV32-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.nxv2i1.i32(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i32 -1, i32 3, i32 5) ; RV32-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP1]], i32 0) ; RV32-NEXT: [[TMP3:%.*]] = insertvalue { <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32> } poison, <vscale x 2 x i32> [[TMP2]], 0 ; RV32-NEXT: [[TMP4:%.*]] = call <vscale x 2 x i32> @llvm.riscv.tuple.extract.nxv2i32.triscv.vector.tuple_nxv8i8_7t(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) [[TMP1]], i32 1)@@ -400,7 +400,7 @@ define void @load_factor7_vscale(ptr %ptr) { ; RV32-NEXT: ret void ; ; RV64-LABEL: @load_factor7_vscale(-; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.triscv.vector.tuple_nxv8i8_7t.p0.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], i64 -1, i64 5)+; RV64-NEXT: [[TMP1:%.*]] = call target("riscv.vector.tuple", <vscale x 8 x i8>, 7) @llvm.riscv.vlseg7.mask.triscv.vector.tuple_nxv8i8_7t.p0.nxv2i1.i64(target("riscv.vector.tuple", <vscale x 8 x i8>, 7) poison, ptr [[PTR:%.*]], <vscale x 2 x i1> splat (i1 true), i64 -1, i64 3, i64 5) ; RV64-NEXT: [[TMP2:%.*]] = ca...[truncated] |
github-actionsbot commentedJul 15, 2025 • edited
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edited
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✅ With the latest revision this PR passed the C/C++ code formatter. |
mshockwave approved these changesJul 15, 2025
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LGTM, thanks
lukel97 approved these changesJul 15, 2025
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LGTM. I swear I thought we already did this because I remember pointing this out in a PR review, but then I realised it was for the VP lowering path.
e5bc7e7 intollvm:main 7 of 9 checks passed
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Goal is to be able to eventually merge some of these code path. Having the mask operand should get dropped cleanly via pattern match.