|
| 1 | +/* |
| 2 | + ******************************************************************************* |
| 3 | + * Copyright (c) 2021, STMicroelectronics |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * This software component is licensed by ST under BSD 3-Clause license, |
| 7 | + * the "License"; You may not use this file except in compliance with the |
| 8 | + * License. You may obtain a copy of the License at: |
| 9 | + * opensource.org/licenses/BSD-3-Clause |
| 10 | + * |
| 11 | + ******************************************************************************* |
| 12 | + */ |
| 13 | +/* |
| 14 | + * Automatically generated from STM32F042C(4-6)Tx.xml |
| 15 | + * CubeMX DB release 6.0.10 |
| 16 | + */ |
| 17 | +#include"Arduino.h" |
| 18 | +#include"PeripheralPins.h" |
| 19 | + |
| 20 | +/* ===== |
| 21 | + * Notes: |
| 22 | + * - The pins mentioned Px_y_ALTz are alternative possibilities which use other |
| 23 | + * HW peripheral instances. You can use them the same way as any other "normal" |
| 24 | + * pin (i.e. analogWrite(PA7_ALT0, 128);). |
| 25 | + * |
| 26 | + * - Commented lines are alternative possibilities which are not used per default. |
| 27 | + * If you change them, you will have to know what you do |
| 28 | + * ===== |
| 29 | + */ |
| 30 | + |
| 31 | +//*** ADC *** |
| 32 | + |
| 33 | +#ifdefHAL_ADC_MODULE_ENABLED |
| 34 | +WEAKconstPinMapPinMap_ADC[]= { |
| 35 | + {PA_0,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,0,0)},// ADC_IN0 |
| 36 | + {PA_1,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,1,0)},// ADC_IN1 |
| 37 | + {PA_2,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,2,0)},// ADC_IN2 |
| 38 | + {PA_3,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,3,0)},// ADC_IN3 |
| 39 | + {PA_4,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,4,0)},// ADC_IN4 |
| 40 | + {PA_5,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,5,0)},// ADC_IN5 |
| 41 | + {PA_6,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,6,0)},// ADC_IN6 |
| 42 | + {PA_7,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,7,0)},// ADC_IN7 |
| 43 | + {PB_0,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,8,0)},// ADC_IN8 |
| 44 | + {PB_1,ADC1,STM_PIN_DATA_EXT(STM_MODE_ANALOG,GPIO_NOPULL,0,9,0)},// ADC_IN9 |
| 45 | + {NC,NP,0} |
| 46 | +}; |
| 47 | +#endif |
| 48 | + |
| 49 | +//*** No DAC *** |
| 50 | + |
| 51 | +//*** I2C *** |
| 52 | + |
| 53 | +#ifdefHAL_I2C_MODULE_ENABLED |
| 54 | +WEAKconstPinMapPinMap_I2C_SDA[]= { |
| 55 | + {PA_10,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)}, |
| 56 | + {PA_12,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF5_I2C1)}, |
| 57 | + {PB_7,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 58 | + {PB_9,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 59 | + {PB_11,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 60 | + {PB_14,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF_NONE)}, |
| 61 | + {PF_0,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 62 | + {NC,NP,0} |
| 63 | +}; |
| 64 | +#endif |
| 65 | + |
| 66 | +#ifdefHAL_I2C_MODULE_ENABLED |
| 67 | +WEAKconstPinMapPinMap_I2C_SCL[]= { |
| 68 | + {PA_9,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF4_I2C1)}, |
| 69 | + {PA_11,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF5_I2C1)}, |
| 70 | + {PB_6,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 71 | + {PB_8,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 72 | + {PB_10,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 73 | + {PB_13,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF_NONE)}, |
| 74 | + {PF_1,I2C1,STM_PIN_DATA(STM_MODE_AF_OD,GPIO_NOPULL,GPIO_AF1_I2C1)}, |
| 75 | + {NC,NP,0} |
| 76 | +}; |
| 77 | +#endif |
| 78 | + |
| 79 | +//*** TIM *** |
| 80 | + |
| 81 | +#ifdefHAL_TIM_MODULE_ENABLED |
| 82 | +WEAKconstPinMapPinMap_TIM[]= { |
| 83 | + {PA_0,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,1,0)},// TIM2_CH1 |
| 84 | + {PA_1,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,2,0)},// TIM2_CH2 |
| 85 | + {PA_2,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,3,0)},// TIM2_CH3 |
| 86 | + {PA_3,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,4,0)},// TIM2_CH4 |
| 87 | + {PA_4,TIM14,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF4_TIM14,1,0)},// TIM14_CH1 |
| 88 | + {PA_5,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,1,0)},// TIM2_CH1 |
| 89 | + {PA_6,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,1,0)},// TIM3_CH1 |
| 90 | + {PA_6_ALT0,TIM16,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_TIM16,1,0)},// TIM16_CH1 |
| 91 | + {PA_7,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,1,1)},// TIM1_CH1N |
| 92 | + {PA_7_ALT0,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,2,0)},// TIM3_CH2 |
| 93 | + {PA_7_ALT1,TIM14,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF4_TIM14,1,0)},// TIM14_CH1 |
| 94 | + {PA_7_ALT2,TIM17,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_TIM17,1,0)},// TIM17_CH1 |
| 95 | + {PA_8,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,1,0)},// TIM1_CH1 |
| 96 | + {PA_9,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,2,0)},// TIM1_CH2 |
| 97 | + {PA_10,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,3,0)},// TIM1_CH3 |
| 98 | + {PA_11,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,4,0)},// TIM1_CH4 |
| 99 | + {PA_15,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,1,0)},// TIM2_CH1 |
| 100 | + {PB_0,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,2,1)},// TIM1_CH2N |
| 101 | + {PB_0_ALT0,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,3,0)},// TIM3_CH3 |
| 102 | + {PB_1,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,3,1)},// TIM1_CH3N |
| 103 | + {PB_1_ALT0,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,4,0)},// TIM3_CH4 |
| 104 | + {PB_1_ALT1,TIM14,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_TIM14,1,0)},// TIM14_CH1 |
| 105 | + {PB_3,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,2,0)},// TIM2_CH2 |
| 106 | + {PB_4,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,1,0)},// TIM3_CH1 |
| 107 | + {PB_5,TIM3,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_TIM3,2,0)},// TIM3_CH2 |
| 108 | + {PB_6,TIM16,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM16,1,1)},// TIM16_CH1N |
| 109 | + {PB_7,TIM17,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM17,1,1)},// TIM17_CH1N |
| 110 | + {PB_8,TIM16,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM16,1,0)},// TIM16_CH1 |
| 111 | + {PB_9,TIM17,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM17,1,0)},// TIM17_CH1 |
| 112 | + {PB_10,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,3,0)},// TIM2_CH3 |
| 113 | + {PB_11,TIM2,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM2,4,0)},// TIM2_CH4 |
| 114 | + {PB_13,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,1,1)},// TIM1_CH1N |
| 115 | + {PB_14,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,2,1)},// TIM1_CH2N |
| 116 | + {PB_15,TIM1,STM_PIN_DATA_EXT(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_TIM1,3,1)},// TIM1_CH3N |
| 117 | + {NC,NP,0} |
| 118 | +}; |
| 119 | +#endif |
| 120 | + |
| 121 | +//*** UART *** |
| 122 | + |
| 123 | +#ifdefHAL_UART_MODULE_ENABLED |
| 124 | +WEAKconstPinMapPinMap_UART_TX[]= { |
| 125 | + {PA_2,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 126 | + {PA_9,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART1)}, |
| 127 | + {PA_14,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 128 | + {PB_6,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_USART1)}, |
| 129 | + {NC,NP,0} |
| 130 | +}; |
| 131 | +#endif |
| 132 | + |
| 133 | +#ifdefHAL_UART_MODULE_ENABLED |
| 134 | +WEAKconstPinMapPinMap_UART_RX[]= { |
| 135 | + {PA_3,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 136 | + {PA_10,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART1)}, |
| 137 | + {PA_15,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 138 | + {PB_7,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_USART1)}, |
| 139 | + {NC,NP,0} |
| 140 | +}; |
| 141 | +#endif |
| 142 | + |
| 143 | +#ifdefHAL_UART_MODULE_ENABLED |
| 144 | +WEAKconstPinMapPinMap_UART_RTS[]= { |
| 145 | + {PA_1,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 146 | + {PA_12,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART1)}, |
| 147 | + {NC,NP,0} |
| 148 | +}; |
| 149 | +#endif |
| 150 | + |
| 151 | +#ifdefHAL_UART_MODULE_ENABLED |
| 152 | +WEAKconstPinMapPinMap_UART_CTS[]= { |
| 153 | + {PA_0,USART2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART2)}, |
| 154 | + {PA_11,USART1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF1_USART1)}, |
| 155 | + {NC,NP,0} |
| 156 | +}; |
| 157 | +#endif |
| 158 | + |
| 159 | +//*** SPI *** |
| 160 | + |
| 161 | +#ifdefHAL_SPI_MODULE_ENABLED |
| 162 | +WEAKconstPinMapPinMap_SPI_MOSI[]= { |
| 163 | + {PA_7,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 164 | + {PB_5,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 165 | + {PB_15,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI2)}, |
| 166 | + {NC,NP,0} |
| 167 | +}; |
| 168 | +#endif |
| 169 | + |
| 170 | +#ifdefHAL_SPI_MODULE_ENABLED |
| 171 | +WEAKconstPinMapPinMap_SPI_MISO[]= { |
| 172 | + {PA_6,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 173 | + {PB_4,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 174 | + {PB_14,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI2)}, |
| 175 | + {NC,NP,0} |
| 176 | +}; |
| 177 | +#endif |
| 178 | + |
| 179 | +#ifdefHAL_SPI_MODULE_ENABLED |
| 180 | +WEAKconstPinMapPinMap_SPI_SCLK[]= { |
| 181 | + {PA_5,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 182 | + {PB_3,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 183 | + {PB_10,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)}, |
| 184 | + {PB_13,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI2)}, |
| 185 | + {NC,NP,0} |
| 186 | +}; |
| 187 | +#endif |
| 188 | + |
| 189 | +#ifdefHAL_SPI_MODULE_ENABLED |
| 190 | +WEAKconstPinMapPinMap_SPI_SSEL[]= { |
| 191 | + {PA_4,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 192 | + {PA_15,SPI1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI1)}, |
| 193 | + {PB_9,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_SPI2)}, |
| 194 | + {PB_12,SPI2,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF0_SPI2)}, |
| 195 | + {NC,NP,0} |
| 196 | +}; |
| 197 | +#endif |
| 198 | + |
| 199 | +//*** CAN *** |
| 200 | + |
| 201 | +#ifdefHAL_CAN_MODULE_ENABLED |
| 202 | +WEAKconstPinMapPinMap_CAN_RD[]= { |
| 203 | + {PA_11,CAN1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF4_CAN)}, |
| 204 | + {PB_8,CAN1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF4_CAN)}, |
| 205 | + {NC,NP,0} |
| 206 | +}; |
| 207 | +#endif |
| 208 | + |
| 209 | +#ifdefHAL_CAN_MODULE_ENABLED |
| 210 | +WEAKconstPinMapPinMap_CAN_TD[]= { |
| 211 | + {PA_12,CAN1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF4_CAN)}, |
| 212 | + {PB_9,CAN1,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_NOPULL,GPIO_AF4_CAN)}, |
| 213 | + {NC,NP,0} |
| 214 | +}; |
| 215 | +#endif |
| 216 | + |
| 217 | +//*** No ETHERNET *** |
| 218 | + |
| 219 | +//*** No QUADSPI *** |
| 220 | + |
| 221 | +//*** USB *** |
| 222 | + |
| 223 | +#if defined(HAL_PCD_MODULE_ENABLED)|| defined(HAL_HCD_MODULE_ENABLED) |
| 224 | +WEAKconstPinMapPinMap_USB[]= { |
| 225 | + {PA_4,USB,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_USB)},// USB_NOE |
| 226 | + {PA_11,USB,STM_PIN_DATA(STM_MODE_INPUT,GPIO_NOPULL,GPIO_AF_NONE)},// USB_DM |
| 227 | + {PA_12,USB,STM_PIN_DATA(STM_MODE_INPUT,GPIO_NOPULL,GPIO_AF_NONE)},// USB_DP |
| 228 | + {PA_13,USB,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF2_USB)},// USB_NOE |
| 229 | + {PA_15,USB,STM_PIN_DATA(STM_MODE_AF_PP,GPIO_PULLUP,GPIO_AF5_USB)},// USB_NOE |
| 230 | + {NC,NP,0} |
| 231 | +}; |
| 232 | +#endif |
| 233 | + |
| 234 | +//*** No SD *** |