* Re-implement PWM generator logicAdd special-purpose PWM logic to preserve alignment of PWM signals forthings like RGB LEDs.Keep a sorted list of GPIO changes in memory.  At time 0 of the PWMcycle, set all pins to high.  As time progresses bring down theadditional pins as their duty cycle runs out.  This way all PWM signalsare time aligned by construction.This also reduces the number of PWM interrupts by up to 50%.  Before,both the rising and falling edge of a PWM pin required an interrupt (andcould shift arround accordingly).  Now, a single IRQ sets all PWM risingedges (so 1 no matter how many PWM pins) and individual interruptsgenerate the falling edges.The code favors duty cycle accuracy over PWM period accuracy (since PWMis simulating an analog voltage it's the %age of time high that's thecritical factor in most apps, not the refresh rate).  Measurements giveit about 35% less total error over full range at 20khz than master.@me-no-dev used something very similar in the original PWM generator.* Adjust running PWM when analogWriteFreq changedUse fixed point math to adjust running PWM channels to the newfrequency.* Also preserve phase of running tone/waveformsCopy over full high/low periods only on the falling edge of a cycle,ensuring phase alignment for Tone and Servo.* Clean up signed/unsigned mismatch, 160MHz operat'n* Turn off PWM on a Tone or digitalWriteEnsure both the general purpose waveform generator and the PWM generatorare disabled on a pin used for Tone/digitalWrite.* Remove hump due to fixed IRQ deltaA hump in the dueling PWMs was very prominent in prior pulls.The hump was caused by having a PWM falling edge just before the cyclerestart, while having the other channel requesting a 1->0 transitionjust outside the busy-loop window of 10us. So it gets an IRQ for channelB 0->1, then waits 2..8us for the next PWM full cycle 0->1, and ends upreturning from interrupt and not scheduling another IRQ for 10us...hencethe horizontal leg of the bump...Reduce the minimum IRQ latency a little bit to minimize this effect.There will still be a (significantly smaller) hump when things cross, butit won't be anywhere near as bad or detectable.* Speed PWM generator by reordering data structBreaking out bitfields required a load and an AND, slowing things downin the PWM loop. Convert the bitfield into two separate natural-sizedarrays to reduce code size and increase accuracy.* Remove if() that could never evaluate TRUE* Add error feedback to waveform generationApply an error term to generated waveform phase times to adjust for anyother ongoing processes/waveforms.  Take the actual edge generationtimes, subtract them from the desired, and add 1/4 of that (to dampenany potential oscillations) to the next similar phase of that waveform.Allows the waveform to seek its proper period and duty cycle withouthardcoding any specific calibrations (which would change depending onthe codepaths, compiler options, etc.) in the source.* Move _stopPWM and _removePWMEntry to IRAMThanks to@dok-net for noticing these need to be in IRAM as they may becalled by digitalWrites in an IRQ.* Avoid long wait times when PWM freq is low* Fix bug where tone/pwm could happen on same pin* Adjust for random 160MHZ operationThe WiFi stack sometimes changes frequency behind our backs, so ESP'scycle counter does not count constant ticks.We can't know how long it's been at a different than expected frequency,so do the next best thing and make sure we adjust any ESP cycles we'rewaiting for by the current CPU speed.This can lead to a blip in the waveform for 1 period when the frequencytoggles from normal, and when it toggles back, but it should remainfor the intervening periods.Should avoid a lot of LED shimmering and servo errors during WiFiconnection (and maybe transmission).* Clean up leftover debugs in ISR* Subtract constant-time overhead for PWM, add 60khzPWM has a constant minimum time between loops with a single pin, so pullthat time out of the desired PWM period and shift the center of the PWMfrequency closer to the desired without any dynamic feedback needed.Enable 60khz PWM, even though it's not terribly useful as it causes anIRQ every ~8us (and each IRQ is 2-3us).  The core can still run w/o WDT,but it's performance is about 5x slower than unloaded.* Fix GPIO16 not toggling properly.* Remove constant offset to PWM periodanalogWrite doesn't know about the change in total PWM cycles, so it ispossible for it to send in a value that's beyond the maximum adjustedPWM cycle count, royally messing up things.  Remove the offset.Also, fix bug with timer callback functions potentially disabling thetimer if PWM was still active.* Remove volatiles, replace with explicit membarrierVolatiles are expensive in flash/IRAM as well as in runtime because theyintroduce `memw` instructions everywhere their values are used.Remove the volatiles and manually mark handshake signals forre-read/flush to reduce code and runtime in the waveform generator/PWM.* Consolidate data into single structureSave IRAM and flash by using a class to hold waveform generator state.Allows for bast+offset addressing to be used in many cases, removing`l32r` and literals from the assembly code.* Factor out common timer shutdown code* Remove unneeded extra copy on PWM start* Factor out common edge work in waveform loop* Factor out waveform phase feedback loop math* Reduce PWM size by using 32b count, indexesByte-wide operations require extra instructions, so make index and counta full 32-bits wide.* GP16O is a 1-bit register, just write to itTesting indicates that GP16O is just a simple 1-bit wide register in theRTC module.  Instead of |= and &- (i.e. RmW), use direct assignment inPWM generator.* Increase PWM linearity in low/high regionsBy adjusting the PWM cycle slightly to account for the fixed timethrough the compute loop, increase the linear response near the min andmax areas.* Remove redundant GetCycleCount (non-IRQ)* Factor out common timer setup operations* Fix clean-waveform transition, lock to tone fasterNew startWaveform waveforms were being copied over on the falling edgeof the cycle, not the rising edge.  Everything else is based on risingedge, so adjust accordingly.Also, feedback a larger % of the error term in standard waveformgeneration.  Balances the speed at which it locks to tones underchanging circumstances with it not going completely bonkers when atransient error occurs due to some other bit.* Reduce IRAM by pushing more work to _setPWMSimply mark pins as inactive, don't adjust the ordered list until thenext _startPWM call (in IROM).* Fix typo in PWM pin 1->0 transitionActually check the pin mask is active before setting the PWM pin low.D'oh.* Combine cleanup and pin remove, save 50 bytes IROMThe cleanup (where marked-off pins are removed from the PWM time map)and remove (where a chosen pin is taken out of the PWM map) doessentially the same processing.  Combine them and save ~50 bytes ofcode and speed things up a tiny bit.* Remove unused analogMap, toneMapSave ~100 bytes of IROM by removing the tone/analog pin tracking fromthe interface functions.  They were completely unused.* Save IRAM/heap by adjusting WVF update structThe waveform update structure included 2 32-bit quantities (so, used8 * 17 = 136 bytes of RAM) for the next cycle of a waveform.Replace that with a single update register, in a posted fashion.  Thelogic now sets the new state of a single waveform and returnsimmediately (so, no need to wait 1ms if you've got an existing waveformof 1khz).  The waveform NMI will pick up the changed value on its nextcycle.Reduces IRAM by 40 bytes, and heap by 144 bytes.* Don't duplicate PWM period calculationLet the waveform generator be the single source of truth for the PWMperiod in clock cycles.Reduces IRAM by 32 bytes and makes things generally saner.* Factor out common PWM update codeReplace repeated PWM update logic with a subroutine, and move thePWMUpdate pointer into the state itself.  Reduces IROM and IRAM,removes code duplication.Also remove single-use macros and ifdef configurable options as theIRAM and IROM impact of them are now not very large.* Fix regression when analogWrite done coldLost an `initTimer()` call in a refactoring, resulting in the corehanging forever while waiting for the NMI which will never happen.Re-add as appropriate.* Save 16b of IRAM by not re-setting edge intr bitPer@dok-net, drop the rewrite of the edge trigger flag in the timerinterrupt register.  It's set on startup and never cleared, so this isredundant.  Drops ~16 bytes of IRAM.* Allow on-the-fly PWM frequency changesWhen PWM is running and analogWriteFreq is called, re-calculate theentire set of PWM pins to the new frequency.  Preserve the rawnumerator/denominator in an unused bit of the waveform structure toavoid wasting memory.* Adjust for fixed overhead on PWM periodPulls the actual PWM period closer to the requested one with a simple,0-overhead static adjustment.* Fix value reversal when analogWrite out of rangeSilly mistake, swapped high and low values when checking analogWrite forover/under values.  Fixed* Don't optimize the satopWaveform callSave a few bytes of IRAM by not using -O2 on the stopWaveform call.  Itis not a speed-critical function.* Avoid side effects in addPWMtoList* Adjust PWM period as fcn of # of PWM pinsResults in much closer PWM frequency range over any number of PWM pins,while taking 0 add'l overhead in IRAM or in the IRQ.* Fix occasional Tone artifactsWhen _setPWMFreq was called the initial PWM mask was not set to 0leading to occasional issues where non-PWM pins would be set to 1on the nextPWM cycle.  Manifested itself as an overtone at the PWMfrequency +/-.* Reduce CPU usage and enhance low range PWM outputBorrow a trick from#7022 to exit the busy loop when the next event istoo far out.  Also reduce the IRQ delta subtraction because it wasinitially not NMI so there was much more variation than now.Keep the PWM state machine active at a higher prio than the standardtone generation when the next edge is very close (i.e. when we're atthe max or min of the range and have 2 or more near edges).  Adds alot of resolution to the response at low and high ranges.Go from relative to absolute cycle counts in the main IRQ loop so thatwe don't mingle delta-cycles when the delta start was significantlydifferent.* Update min IRQ time to remove humps in PWM linearityKeep PWM error <2.0% on entire range, from 0-100%, and remove thehump seen in testC by fixing the min IRQ delay setting.* Remove minor bump at high PWM frequenciesThe IRQ lead time was a tiny bit undersized, causing IRQs to come backtoo late for about .25us worth of PWM range.  Adjust the constantaccordingly