Pre-indexed addressing with writeback allows computingx = x + c; var y = *x in a single instruction on arm64. We should add support for this.

The post-indexed addressing mode was added as an emitter peephole in#105181.#105185 adds a lowering transformation that tries to set the IR up to produce patterns that are amenable to be replaced by the peephole in the emitter. The pre-indexing can work in a similar way: run the peephole when we are going to emit a load/store instruction and try to combine it with a previous add/sub. In lowering try to look for a previousGT_ADD/GT_SUB RMW to make adjacent when we see an indir. One problematic thing there is that we currently do not have a convenient list of the previous RMWADD/SUB nodes, so we either need to search for longer (probably expensive) or we need to add such a list.