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Merge branch 'mv88e6xxx-cross-chip-bridging'
Vivien Didelot says:====================net: dsa: mv88e6xxx: program cross-chip bridgingThe purpose of this patch series is to bring hardware cross-chipbridging configuration to the DSA layer and the mv88e6xxx DSA driver.Most recent Marvell switch chips have a Cross-chip Port Based VLAN Table(PVT) used to restrict to which internal destination port an arbitraryexternal source port is allowed to egress frames to.The current behavior of the mv88e6xxx driver is to program this tabletable with all ones, allowing any external ports to egress frames on anyinternal ports. This means that carefully crafted Ethernet frames canpotentially bypass the user bridging configuration.Patches 1 to 7 prepare the setup of this table and factorize the commonbits of both in-chip and cross-chip Marvell bridging code.Patch 8 adds new optional cross-chip bridging operations to DSA switch.Patch 9 switches the current behavior to program the table according tothe user bridging configuration when (cross-chip) ports get (un)bridged.On a ZII Rev B board, bridging together the 3 user ports of both 88E6352will result in the following PVTs on respectively switch 0 and switch 1: External Internal Ports Dev Port 0 1 2 3 4 5 6 1 0 * * * - - * * 1 1 * * * - - * * 1 2 * * * - - * * 1 3 - - - - - * * 1 4 - - - - - * * 1 5 * * * * * * * 1 6 * * * * * * * 0 0 * * * - - * * 0 1 * * * - - * * 0 2 * * * - - * * 0 3 - - - - - * * 0 4 - - - - - * * 0 5 * * * * * * * 0 6 * * * * * * *Changes since v2: - Define MV88E6XXX_MAX_PVT_SWITCHES and MV88E6XXX_MAX_PVT_PORTS - use mv88e6xxx_g2_misc_4_bit_port instead of the 5-bit variant - add Andrew's tags and reword commit 6/9====================Signed-off-by: David S. Miller <davem@davemloft.net>