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forked fromtorvalds/linux

Commit4c4ce30

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Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Thomas Gleixner: "A small set of fixes from the timer departement: - Add a missing timer wheel clock forward when migrating timers off a unplugged CPU to prevent operating on a stale clock base and missing timer deadlines. - Use the proper shift count to extract data from a register value to prevent evaluating unrelated bits - Make the error return check in the FSL timer driver work correctly. Checking an unsigned variable for less than zero does not really work well. - Clarify the confusing comments in the ARC timer code"* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timers: Forward timer base before migrating timers clocksource/drivers/arc_timer: Update some comments clocksource/drivers/mips-gic-timer: Use correct shift count to extract data clocksource/drivers/fsl_ftm_timer: Fix error return checking
2 parentsff8d583 +c52232a commit4c4ce30

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4 files changed

+16
-5
lines changed

4 files changed

+16
-5
lines changed

‎drivers/clocksource/arc_timer.c‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -251,9 +251,14 @@ static irqreturn_t timer_irq_handler(int irq, void *dev_id)
251251
intirq_reenable=clockevent_state_periodic(evt);
252252

253253
/*
254-
* Any write to CTRL reg ACks the interrupt, we rewrite the
255-
* Count when [N]ot [H]alted bit.
256-
* And re-arm it if perioid by [I]nterrupt [E]nable bit
254+
* 1. ACK the interrupt
255+
* - For ARC700, any write to CTRL reg ACKs it, so just rewrite
256+
* Count when [N]ot [H]alted bit.
257+
* - For HS3x, it is a bit subtle. On taken count-down interrupt,
258+
* IP bit [3] is set, which needs to be cleared for ACK'ing.
259+
* The write below can only update the other two bits, hence
260+
* explicitly clears IP bit
261+
* 2. Re-arm interrupt if periodic by writing to IE bit [0]
257262
*/
258263
write_aux_reg(ARC_REG_TIMER0_CTRL,irq_reenable |TIMER_CTRL_NH);
259264

‎drivers/clocksource/fsl_ftm_timer.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -281,7 +281,7 @@ static int __init __ftm_clk_init(struct device_node *np, char *cnt_name,
281281

282282
staticunsigned long__initftm_clk_init(structdevice_node*np)
283283
{
284-
unsignedlongfreq;
284+
longfreq;
285285

286286
freq=__ftm_clk_init(np,"ftm-evt-counter-en","ftm-evt");
287287
if (freq <=0)

‎drivers/clocksource/mips-gic-timer.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -166,7 +166,7 @@ static int __init __gic_clocksource_init(void)
166166

167167
/* Set clocksource mask. */
168168
count_width=read_gic_config()&GIC_CONFIG_COUNTBITS;
169-
count_width >>=__fls(GIC_CONFIG_COUNTBITS);
169+
count_width >>=__ffs(GIC_CONFIG_COUNTBITS);
170170
count_width *=4;
171171
count_width+=32;
172172
gic_clocksource.mask=CLOCKSOURCE_MASK(count_width);

‎kernel/time/timer.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1894,6 +1894,12 @@ int timers_dead_cpu(unsigned int cpu)
18941894
raw_spin_lock_irq(&new_base->lock);
18951895
raw_spin_lock_nested(&old_base->lock,SINGLE_DEPTH_NESTING);
18961896

1897+
/*
1898+
* The current CPUs base clock might be stale. Update it
1899+
* before moving the timers over.
1900+
*/
1901+
forward_timer_base(new_base);
1902+
18971903
BUG_ON(old_base->running_timer);
18981904

18991905
for (i=0;i<WHEEL_SIZE;i++)

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