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🔗 chipsalliance.org | 📫 info@chipsalliance.org

The CHIPS Alliance develops high-quality, open source hardware designs and tools relevant to ASICs and FPGAs. By creating an open and collaborative environment, CHIPS Alliance shares resources to lower the cost of development. Companies and individuals can work together to develop open source CPUs, various peripherals, and complex IP blocks, as well as open source hardware or software tools to accelerate the creation of more efficient and innovative chip designs.

The CHIPS Alliance hosts multiple open sourceProjects, which areWorkgroups.

Popular repositoriesLoading

chiselchiselPublic
Chisel: A Modern Hardware Design Language
Scala 4.3k 632
rocket-chiprocket-chipPublic
Rocket Chip Generator
Scala 3.5k 1.2k
veribleveriblePublic
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
C++ 1.6k 244
riscv-dvriscv-dvPublic
Random instruction generator for RISC-V processor verification
Python 1.1k 350
Cores-VeeR-EH1Cores-VeeR-EH1Public
VeeR EH1 core
SystemVerilog 884 230
firrtlfirrtlPublic archive
Flexible Intermediate Representation for RTL
Scala 747 181

Showing 10 of 110 repositories

sv-tests Public
Test suite designed to check compliance with the SystemVerilog standard.
chipsalliance/sv-tests’s past year of commit activity
SystemVerilog 333ISC 83 49 (5 issues need help) 20 UpdatedJul 12, 2025
Caliptra Public
Caliptra IP and firmware for integrated Root of Trust block
chipsalliance/Caliptra’s past year of commit activity
308Apache-2.0 49 48 9 UpdatedJul 12, 2025
caliptra-sw Public
Caliptra software (ROM, FMC, runtime firmware), and libraries/tools needed to build and test
chipsalliance/caliptra-sw’s past year of commit activity
Rust 119Apache-2.0 63 147 58 UpdatedJul 12, 2025
chisel Public
Chisel: A Modern Hardware Design Language
chipsalliance/chisel’s past year of commit activity
Scala 4,340Apache-2.0 632 338 (1 issue needs help) 144 UpdatedJul 12, 2025
caliptra-mcu-sw Public
Caliptra MCU Software
chipsalliance/caliptra-mcu-sw’s past year of commit activity
Rust 16Apache-2.0 12 22 5 UpdatedJul 12, 2025
sv-tests-results Public
Output of the sv-tests runs.
chipsalliance/sv-tests-results’s past year of commit activity
HTML 7 6 0 0 UpdatedJul 12, 2025
verilator Public Forked fromverilator/verilator
Verilator open-source SystemVerilog simulator and lint system
chipsalliance/verilator’s past year of commit activity
C++ 39LGPL-3.0 686 0 0 UpdatedJul 12, 2025
i3c-core Public
chipsalliance/i3c-core’s past year of commit activity
SystemVerilog 30Apache-2.0 9 4 1 UpdatedJul 12, 2025
firrtl-spec Public
The specification for the FIRRTL language
chipsalliance/firrtl-spec’s past year of commit activity
TeX 58 32 25 17 UpdatedJul 11, 2025
caliptra-rtl Public
HW Design Collateral for Caliptra RoT IP
chipsalliance/caliptra-rtl’s past year of commit activity
SystemVerilog 100Apache-2.0 57 84 16 UpdatedJul 11, 2025