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Add missing rotates for cranelift#11723

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This adds the missed rotate optimizations in cranelift mid-end opened in#11722

(module  (func$main (export"main") (resulti32);; Step 1: (i32.rotl (i32.const 1) (i32.const 1));; 1 in binary (32-bit) = 0b...0001;; Rotate left by 1 bit = 0b...0010 = 2    (i32.rotl (i32.const1) (i32.const1));; Step 2: (i32.rotr (i32.const 10) (i32.const 1));; 10 in binary = 0b...1010;; Rotate right by 1 bit = 0b...0101 = 5    (i32.rotr (i32.const10) (i32.const1));; Step 3: Add the results;; 2 + 5 = 7    (i32.add)  ))

Before PR:

;; Intermediate Representation of function <wasm[0]::function[0]::main>:function u0:0(i64 vmctx, i64) -> i32 tail {    gv0 = vmctx    gv1 = load.i64 notrap aligned readonly gv0+8    gv2 = load.i64 notrap aligned gv1+16    stack_limit = gv2                                block0(v0: i64, v1: i64):@002d                               jump block1                                block1:@0022                               v3 = iconst.i32 1@0026                               v5 = rotl v3, v3  ; v3 = 1, v3 = 1@0027                               v6 = iconst.i32 10@002b                               v8 = rotr v6, v3  ; v6 = 10, v3 = 1@002c                               v9 = iadd v5, v8@002d                               return v9}

After PR:

;; Intermediate Representation of function <wasm[0]::function[0]::main>:function u0:0(i64 vmctx, i64) -> i32 tail {    gv0 = vmctx    gv1 = load.i64 notrap aligned readonly gv0+8    gv2 = load.i64 notrap aligned gv1+16    stack_limit = gv2                                block0(v0: i64, v1: i64):@002d                               jump block1                                block1:                                    v12 = iconst.i32 7@002d                               return v12  ; v12 = 7}

@khagankhankhagankhan requested a review froma team as acode ownerSeptember 19, 2025 23:56
@khagankhankhagankhan requested review fromalexcrichton and removed request fora teamSeptember 19, 2025 23:56
@github-actionsgithub-actionsbot added craneliftIssues related to the Cranelift code generator isleRelated to the ISLE domain-specific language labelsSep 20, 2025
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Thanks! Mind adding some tests for this too? They'd go incranelift/filetests/filetests/egraph for testing the IR is updated appropriately andcranelift/filetests/filetests/runtests for ensuring that the behavior matches the interpreter.


#[inline]
fn imm64_rotl(&mutself, ty:Type, x:Imm64, k:Imm64) ->Imm64{
let bw:u32 = ty.bits().min(64);
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Themin here should be an assert of some form because ifty.bits() is>=64 then that's an invalid state for this function to be in and it should panic.

#[inline]
fn imm64_rotl(&mutself, ty:Type, x:Imm64, k:Imm64) ->Imm64{
let bw:u32 = ty.bits().min(64);
let amt:u32 =if bw ==0{0} else{(k.bits()asu32) % bw};
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It's ok to not test for 0 here because a 0-size integral type should cause a panic (which% 0 would do I believe). Handling it here would accidentally try to recover from what should otherwise be a panicking situation.

let bw:u32 = ty.bits().min(64);
let amt:u32 =if bw ==0{0} else{(k.bits()asu32) % bw};

let xv = x.bits()asu64;
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I'd recommend usingcast_unsigned here as it avoid usingas which is something we try to avoid since it's by default a lossy cast.

Comment on lines +37 to +39
8 =>(xvasu8).rotate_left(amt)asu64,
16 =>(xvasu16).rotate_left(amt)asu64,
32 =>(xvasu32).rotate_left(amt)asu64,
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For promotion back up to u64 I'd recommend usingu64::from((xv as u8).rotate_left(amt)) to avoidas u64. Theas u8 is still required, however, as this is intentionally truncating data.

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Sure thing!@alexcrichton Just made PR to get initial thoughts. I will address the comments

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