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1. AMBA-AXI4-LiteAMBA-AXI4-LitePublic

   An implementation of AMBA AXI4Lite on an FPGA using verilog

   Verilog 3 1

2. RTL-design-using-Verilog-with-SKY130-TechnologyRTL-design-using-Verilog-with-SKY130-TechnologyPublic

   a Workshop by Kunal Ghosh and VSDIAT

   1

3. RISCV-MYTH-WORKSHOP/riscv_myth_workshop_nov22-anmol109RISCV-MYTH-WORKSHOP/riscv_myth_workshop_nov22-anmol109Public

   riscv_myth_workshop_nov22-anmol109 created by GitHub Classroom

4. Pseudo-Noise-Sequence-to-Triangular-and-Sinusoidal-Wave-ConverterPseudo-Noise-Sequence-to-Triangular-and-Sinusoidal-Wave-ConverterPublic

5. RISC-V-coreRISC-V-corePublic

   RV32IM with branch predictor design

   Verilog