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[proposal][wip] Add event trace configuration to mlir-aie#2705

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80a48e3
Add a callable library function to parse_trace.py
fifieldNov 13, 2025
733652a
Apply suggestions from code review
fifieldNov 13, 2025
edee5a6
Generate trace_events package with CMake instead of checking into git
fifieldNov 10, 2025
7a7e694
Apply suggestions from code review
fifieldNov 11, 2025
a1cb4cf
Make duplicate event number detection fail the build (#2697)
CopilotNov 11, 2025
e1bfbde
Generate and include tablegen event enums in AIE dialect
fifieldNov 14, 2025
543bedb
Commit 1: Add TableGen definitions for trace operations
fifieldNov 8, 2025
c5e52d5
Commit 2: Add verification tests for trace operations
fifieldNov 8, 2025
7034d74
Commit 3: Implement standalone JSON register database loader
fifieldNov 8, 2025
6c506c6
Commit 4: Implement AIETraceToConfigPass
fifieldNov 8, 2025
c7c734c
Commit 5: Implement AIEInlineTraceConfigPass
fifieldNov 8, 2025
c4c8b5e
Commit 6: Add AIEConfigToNPUPass stub implementation
fifieldNov 8, 2025
a25c6fe
Commit 7: Add end-to-end trace pipeline test
fifieldNov 8, 2025
b4f5660
Complete Pass 3 implementation with RegisterDatabase integration
fifieldNov 8, 2025
b611636
Refactor: Fix design issue with col/row preservation
fifieldNov 8, 2025
248af1c
Move trace NPU passes to AIEX dialect (fixes AIEX loading issue)
fifieldNov 8, 2025
9a4ff28
Move and update trace tests to AIEX dialect
fifieldNov 8, 2025
184c25d
Update AIEX tests to use runtime_sequence
fifieldNov 8, 2025
10449f3
checkpoint
fifieldNov 10, 2025
4a4e41f
start a test
fifieldNov 11, 2025
300908f
format
fifieldNov 11, 2025
6b591cc
checkpoint
fifieldNov 11, 2025
97007eb
updates, fixes, formatting
fifieldNov 12, 2025
caaf7f4
clang-format
fifieldNov 12, 2025
b58edf2
remove aie-config-to-npu placeholder
fifieldNov 12, 2025
6556d01
fixes for core mem events
fifieldNov 12, 2025
1635816
fix test location
fifieldNov 12, 2025
aa79764
Add stream switch port event monitoring to AIE trace infrastructure
fifieldNov 13, 2025
41ba2c7
update example to use aie.trace.port
fifieldNov 13, 2025
bb18de2
Replace BoolAttr with DMAChannelDir for trace port direction
fifieldNov 13, 2025
ebfab0d
Add test.py for trace example
fifieldNov 13, 2025
6095f3a
implement trace and combo event op tablegen
fifieldNov 14, 2025
7907894
Update lower pass for combo and edge events
fifieldNov 14, 2025
01c9a32
Update dialect to use generated enums for events
fifieldNov 15, 2025
a2433db
fix aie1 suffix
fifieldNov 15, 2025
e6a6457
checkpoint
fifieldNov 15, 2025
2532c8a
fixes, format, refactor, cleanup
fifieldNov 15, 2025
2e0fc12
checkpoint
fifieldNov 15, 2025
ef6c53e
wip
fifieldNov 16, 2025
cc56b4d
cleanup, fixes, refactor
fifieldNov 17, 2025
fc99d49
implement AIETargetModel getStreamSwitchPortIndex
fifieldNov 17, 2025
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cleanup, fixes, refactor
  • Loading branch information
@fifield
fifield committedNov 17, 2025
commitcc56b4d6fe1ac4c2c760bb8c5c39533588bcce3a
58 changes: 58 additions & 0 deletionsinclude/aie/Dialect/AIE/IR/AIETargetModel.h
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Original file line numberDiff line numberDiff line change
Expand Up@@ -12,13 +12,18 @@
#define MLIR_AIE_DEVICEMODEL_H

#include "aie/Dialect/AIE/IR/AIEEnums.h"
#include "aie/Dialect/AIE/IR/AIERegisterDatabase.h"

#include "llvm/ADT/DenseSet.h"

#include <iostream>
#include <memory>

namespace xilinx::AIE {

// Forward declarations
class TileOp;

using TileID = struct TileID {
// friend definition (will define the function as a non-member function in the
// namespace surrounding the class).
Expand DownExpand Up@@ -97,6 +102,19 @@ class AIETargetModel {

uint32_t ModelProperties = 0;

// Register database (loaded lazily on first access)
mutable std::unique_ptr<RegisterDatabase> regDB;
mutable bool regDBLoadAttempted = false;

protected:
/// Subclasses override to provide architecture-specific database loading.
/// Returns nullptr if register database is not available for this architecture.
virtual std::unique_ptr<RegisterDatabase> loadRegisterDatabase() const;

/// Get the register database, loading it lazily on first access.
/// Throws fatal error if database is required but unavailable.
const RegisterDatabase *getRegisterDatabase() const;

public:
TargetModelKind getKind() const { return kind; }

Expand DownExpand Up@@ -348,6 +366,43 @@ class AIETargetModel {

// Returns true if the target model supports the given block format.
virtual bool isSupportedBlockFormat(std::string const &format) const;

/// Register Database API - provides access to register and event information
/// for trace configuration and low-level register access.

/// Lookup register information by name and tile.
/// @param name Register name (e.g., "Trace_Control0")
/// @param tile Tile operation to determine module context
/// @param isMem True for memory module registers, false for core/shim
/// @return Pointer to register info, or nullptr if not found
/// @throws fatal_error if database required but unavailable
const RegisterInfo *lookupRegister(llvm::StringRef name, TileOp tile,
bool isMem = false) const;

/// Lookup event number by name and tile.
/// @param name Event name (e.g., "INSTR_EVENT_0", "DMA_S2MM_0_START_TASK")
/// @param tile Tile operation to determine module context
/// @param isMem True for memory module events, false for core/shim
/// @return Event number if found, nullopt otherwise
/// @throws fatal_error if database required but unavailable
std::optional<uint32_t> lookupEvent(llvm::StringRef name, TileOp tile,
bool isMem = false) const;

/// Encode a field value with proper bit shifting.
/// @param field Bit field information
/// @param value Value to encode
/// @return Value shifted to correct bit position
/// @throws fatal_error if database required but unavailable
uint32_t encodeFieldValue(const BitFieldInfo &field, uint32_t value) const;

/// Resolve stream switch port specification to port index.
/// @param value Port specification string (e.g., "NORTH:1", "DMA:0")
/// @param tile Tile operation for context
/// @param master True for master port, false for slave
/// @return Port index for stream switch register, or nullopt if invalid
/// @throws fatal_error if database required but unavailable
std::optional<uint32_t> resolvePortValue(llvm::StringRef value, TileOp tile,
bool master) const;
};

class AIE1TargetModel : public AIETargetModel {
Expand DownExpand Up@@ -446,6 +501,9 @@ class AIE1TargetModel : public AIETargetModel {
};

class AIE2TargetModel : public AIETargetModel {
protected:
std::unique_ptr<RegisterDatabase> loadRegisterDatabase() const override;

public:
AIE2TargetModel(TargetModelKind k) : AIETargetModel(k) {
// Device properties initialization
Expand Down
20 changes: 10 additions & 10 deletionsinclude/aie/Dialect/AIE/IR/AIETraceAttrs.td
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Original file line numberDiff line numberDiff line change
Expand Up@@ -75,34 +75,34 @@ def TracePacketTypeAttr : I32EnumAttr<"TracePacketType",
def TraceEventAttr : AttrDef<AIE_Dialect, "TraceEvent"> {
let mnemonic = "trace_event";
let summary = "Reference to a trace event by name or enum";

let description = [{
References an event by name string or typed enum. Strings are used for
generic references that are resolved during lowering. Enums provide
compile-time type checking.

Validated against:
- Tile type (core events only valid for core tiles, etc.)
- Architecture (AIE/AIE2/AIE2P/AIE4)
Examples:

Examples:
"INSTR_EVENT_0" // String (resolved during lowering)
INSTR_EVENT_0 // Enum (CoreEventAIE2::INSTR_EVENT_0)
}];

let parameters = (ins
"Attribute":$value // Can be StringAttr, IntegerAttr (for enums), etc.
);
let assemblyFormat = "custom<TraceEventValue>($value)";

let assemblyFormat = "`<`custom<TraceEventValue>($value) `>`";

let extraClassDeclaration = [{
// Helper to get event name as string for lookups
std::string getEventName() const;

// Check if this is a string attribute (needs promotion)
bool isStringAttr() const;

// Get the underlying enum value if this is an enum
std::optional<int64_t> getEnumValue() const;
}];
Expand Down
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