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Integrate support for stream port connections on objectfifos#2693

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d0068d2
Initial integratoin from aie4 code base
jackl-xilinxNov 10, 2025
cee862e
format fix
jackl-xilinxNov 10, 2025
185c8b4
Merge branch 'main' into half-objfifo
jackl-xilinxNov 10, 2025
2192c95
format fix
jackl-xilinxNov 10, 2025
8b7f95d
Updated comment and additional edits
jackl-xilinxNov 10, 2025
2c13b1f
Merge branch 'main' into half-objfifo
jackl-xilinxNov 10, 2025
fd68653
Fixed type-o
jackl-xilinxNov 10, 2025
99ec739
Merge branch 'half-objfifo' of https://github.com/Xilinx/mlir-aie int…
jackl-xilinxNov 10, 2025
f499367
Fixed reference errors
jackl-xilinxNov 10, 2025
b8747ac
Merge branch 'main' of https://github.com/Xilinx/mlir-aie into half-o…
abiscaNov 17, 2025
bc84e72
Add python wrapper for objfifo register_external_buffers op
abiscaNov 24, 2025
b7a6ef9
Merge branch 'half-objfifo' of https://github.com/Xilinx/mlir-aie int…
abiscaNov 24, 2025
2c20f65
Fix compilation error related to SubviewAccessOp
abiscaNov 24, 2025
d702db2
Format
abiscaNov 24, 2025
28f7625
Add MLIR tests
abiscaNov 24, 2025
71a339f
Fix python test
abiscaNov 24, 2025
4a05980
Update test/python/objFifo.py
AndraBiscaNov 24, 2025
4522bc4
Merge branch 'main' into half-objfifo
AndraBiscaNov 25, 2025
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Fix compilation error related to SubviewAccessOp
  • Loading branch information
@abisca
abisca committedNov 24, 2025
commit2c20f65db76c0d50e6066df189239ccab55d5e88
15 changes: 0 additions & 15 deletionsinclude/aie/Dialect/AIE/IR/AIEOps.td
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Open in desktop
Original file line numberDiff line numberDiff line change
Expand Up@@ -1629,16 +1629,6 @@ def AIE_ShimDMAAllocationOp : AIE_Op<"shim_dma_allocation", [HasParent<"DeviceOp
let extraClassDeclaration = [{
static ::xilinx::AIE::ShimDMAAllocationOp getForSymbol(::xilinx::AIE::DeviceOp device, ::llvm::StringRef symbol);
}];

let builders = [
OpBuilder<(ins "mlir::StringRef":$sym_name, "DMAChannelDir":$dir, "int":$channel_index,
"int":$col, "bool":$plio), [{
build($_builder, $_state, ::mlir::SymbolRefAttr::get(odsBuilder.getContext(), sym_name),
DMAChannelDirAttr::get(odsBuilder.getContext(), dir),
$_builder.getI64IntegerAttr(channel_index),
$_builder.getI64IntegerAttr(col), $_builder.getBoolAttr(plio), nullptr);
}]>
];
}

def AIE_ObjectFifoCreateOp: AIE_Op<"objectfifo", [HasParent<"DeviceOp">, Symbol]> {
Expand DownExpand Up@@ -2024,11 +2014,6 @@ def AIE_ObjectFifoSubviewAccessOp : AIE_Op<"objectfifo.subview.access", []> {
let assemblyFormat = [{
$subview `[` $index `]` attr-dict `:` qualified(type($subview)) `->` qualified(type($output))
}];

// Allow building an AIE_ObjectFifoSubviewAccessOp with just a subview value and an index.
let builders = [
OpBuilder<(ins "mlir::Value":$subview, "size_t":$index)>
];
}

def AIE_ObjectFifoRegisterProcessOp: AIE_Op<"objectfifo.register_process", []> {
Expand Down
44 changes: 8 additions & 36 deletionslib/Dialect/AIE/Transforms/AIEObjectFifoStatefulTransform.cpp
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Original file line numberDiff line numberDiff line change
Expand Up@@ -73,7 +73,7 @@ class LockAnalysis {
//===----------------------------------------------------------------------===//
class DMAChannelAnalysis {
DenseMap<std::tuple<Value, DMAChannelDir, int>, int> channelsPerTile;
DenseMap<std::tuple<Value, DMAChannelDir, int>, int>aiestreamsPerTile;
DenseMap<std::tuple<Value, DMAChannelDir, int>, int>aieStreamsPerTile;

public:
DMAChannelAnalysis(DeviceOp &device) {
Expand DownExpand Up@@ -107,10 +107,10 @@ class DMAChannelAnalysis {
}
for (auto flowOp : device.getOps<FlowOp>()) {
if (flowOp.getSourceBundle() == WireBundle::Core)
aiestreamsPerTile[{flowOp.getSource(), DMAChannelDir::MM2S,
aieStreamsPerTile[{flowOp.getSource(), DMAChannelDir::MM2S,
flowOp.getSourceChannel()}] = 1;
if (flowOp.getDestBundle() == WireBundle::Core)
aiestreamsPerTile[{flowOp.getDest(), DMAChannelDir::S2MM,
aieStreamsPerTile[{flowOp.getDest(), DMAChannelDir::S2MM,
flowOp.getDestChannel()}] = 1;
}
}
Expand DownExpand Up@@ -146,12 +146,12 @@ class DMAChannelAnalysis {
return -1;
}

/// Given a tile and DMAChannel, adds entry toaie4StreamsPerTile or
/// Given a tile and DMAChannel, adds entry toaieStreamsPerTile or
/// throws an error if the stream is already used.
void checkAIEStreamIndex(TileOp tileOp, DMAChannel chan) {
if (aiestreamsPerTile.find({tileOp.getResult(), chan.direction,
chan.channel}) ==aiestreamsPerTile.end()) {
aiestreamsPerTile[{tileOp.getResult(), chan.direction, chan.channel}] = 1;
if (aieStreamsPerTile.find({tileOp.getResult(), chan.direction,
chan.channel}) ==aieStreamsPerTile.end()) {
aieStreamsPerTile[{tileOp.getResult(), chan.direction, chan.channel}] = 1;
} else {
if (chan.direction == DMAChannelDir::MM2S)
tileOp.emitOpError("number of output Core channels exceeded!");
Expand DownExpand Up@@ -2000,7 +2000,7 @@ struct AIEObjectFifoStatefulTransformPass
}

for (auto consumer : consumers) {
// if notaie4 stream, create consumer tile DMA
// if notaie stream, create consumer tile DMA
int consumerChanIndex = -1;
DMAChannel consumerChan;
if (consumer.getAieStream()) {
Expand DownExpand Up@@ -2028,11 +2028,6 @@ struct AIEObjectFifoStatefulTransformPass
// generate objectFifo allocation info
builder.setInsertionPoint(device.getBody()->getTerminator());
if (consumer.getProducerTileOp().isShimTile())
// createObjectFifoAllocationInfo(
// builder, ctx, SymbolRefAttr::get(ctx, producer.getName()),
// consumer.getProducerTileOp().colIndex(),
// consumerChan.direction, consumerChan.channel,
// producer.getPlio(), {});
createObjectFifoAllocationInfo(
builder, ctx, producer,
consumer.getProducerTileOp().colIndex(),
Expand DownExpand Up@@ -2071,29 +2066,6 @@ struct AIEObjectFifoStatefulTransformPass
}
}

// if (clPacketSwObjectFifos) {
// builder.setInsertionPointToStart(&packetflow.getPorts().front());
// builder.create<PacketDestOp>(builder.getUnknownLoc(),
// consumer.getProducerTile(),
// WireBundle::DMA,
// consumerChan.channel);
// }

// BDDimLayoutArrayAttr consumerDims =
// consumer.getDimensionsFromStreamPerConsumer()[0];
// createDMA(device, builder, consumer, consumerChan.direction,
// consumerChan.channel, 1, consumerDims, nullptr, {});
// // generate objectFifo allocation info
// builder.setInsertionPoint(device.getBody()->getTerminator());

// if (consumer.getProducerTileOp().isShimTile())
// createObjectFifoAllocationInfo(
// builder, ctx, producer,
// consumer.getProducerTileOp().colIndex(),
// consumerChan.direction, consumerChan.channel,
// producer.getPlio(),
// {});

if (!clPacketSwObjectFifos) {
// create flow
builder.setInsertionPointAfter(producer);
Expand Down
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