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Commitfc99d49

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implement AIETargetModel getStreamSwitchPortIndex
1 parentcc56b4d commitfc99d49

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4 files changed

+552
-66
lines changed

4 files changed

+552
-66
lines changed

‎include/aie/Dialect/AIE/IR/AIETargetModel.h‎

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121

2222
namespacexilinx::AIE {
2323

24-
// Forward declarations
24+
// Forward declarations
2525
classTileOp;
2626

2727
using TileID =structTileID {
@@ -108,7 +108,8 @@ class AIETargetModel {
108108

109109
protected:
110110
/// Subclasses override to provide architecture-specific database loading.
111-
/// Returns nullptr if register database is not available for this architecture.
111+
/// Returns nullptr if register database is not available for this
112+
/// architecture.
112113
virtual std::unique_ptr<RegisterDatabase>loadRegisterDatabase()const;
113114

114115
/// Get the register database, loading it lazily on first access.
@@ -268,8 +269,8 @@ class AIETargetModel {
268269
/// @return Port index for Stream_Switch_Event_Port_Selection register, or
269270
/// nullopt if invalid
270271
virtual std::optional<uint32_t>
271-
getStreamSwitchPortIndex(int col,int row, WireBundle bundle,int channel,
272-
bool master)const =0;
272+
getStreamSwitchPortIndex(int col,int row, WireBundle bundle,
273+
uint32_t channel,bool master)const =0;
273274

274275
/// Check if a stream switch port is valid for the given tile
275276
/// @param col Tile column
@@ -279,7 +280,7 @@ class AIETargetModel {
279280
/// @param master Master/slave direction
280281
/// @return True if the port configuration is valid
281282
virtualboolisValidStreamSwitchPort(int col,int row, WireBundle bundle,
282-
int channel,bool master)const = 0;
283+
uint32_t channel,bool master)const = 0;
283284

284285
/// Return the number of buffer descriptors supported by the DMA in the given
285286
/// tile.
@@ -483,10 +484,10 @@ class AIE1TargetModel : public AIETargetModel {
483484

484485
std::optional<uint32_t>getStreamSwitchPortIndex(int col,int row,
485486
WireBundle bundle,
486-
int channel,
487+
uint32_t channel,
487488
bool master)constoverride;
488489
boolisValidStreamSwitchPort(int col,int row, WireBundle bundle,
489-
int channel,bool master)constoverride;
490+
uint32_t channel,bool master)constoverride;
490491

491492
uint32_tgetColumnShift()constoverride {return23; }
492493
uint32_tgetRowShift()constoverride {return18; }
@@ -599,10 +600,10 @@ class AIE2TargetModel : public AIETargetModel {
599600

600601
std::optional<uint32_t>getStreamSwitchPortIndex(int col,int row,
601602
WireBundle bundle,
602-
int channel,
603+
uint32_t channel,
603604
bool master)constoverride;
604605
boolisValidStreamSwitchPort(int col,int row, WireBundle bundle,
605-
int channel,bool master)constoverride;
606+
uint32_t channel,bool master)constoverride;
606607

607608
uint32_tgetColumnShift()constoverride {return25; }
608609
uint32_tgetRowShift()constoverride {return20; }

‎include/aie/Dialect/AIE/IR/AIETraceAttrs.td‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -86,12 +86,12 @@ def TraceEventAttr : AttrDef<AIE_Dialect, "TraceEvent"> {
8686
- Architecture (AIE/AIE2/AIE2P/AIE4)
8787

8888
Examples:
89-
"INSTR_EVENT_0" // String (resolved during lowering)
90-
INSTR_EVENT_0// Enum (CoreEventAIE2::INSTR_EVENT_0)
89+
"INSTR_EVENT_0"// String (resolved during lowering)
90+
CoreEventAIE2::INSTR_EVENT_0 // Enum
9191
}];
9292

9393
let parameters = (ins
94-
"Attribute":$value // Can be StringAttr, IntegerAttr (for enums), etc.
94+
"Attribute":$value
9595
);
9696

9797
let assemblyFormat = "`<` custom<TraceEventValue>($value) `>`";

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