#ifndef cc1100_H

#definecc1100_H

#include<Arduino.h>

#defineTRUE1

#defineFALSE0

#defineEEPROM_ADDRESS_CC1100_FREQUENCY0x1F4//ISM band

#defineEEPROM_ADDRESS_CC1100_MODE0x1F5//modulation mode

#defineEEPROM_ADDRESS_CC1100_MY_ADDR0x1F6//receiver address

#defineEEPROM_ADDRESS_CC1100_CHANNEL0x1F7//channel number

#defineSCK_PIN13

#defineMISO_PIN12

#defineMOSI_PIN11

#defineSS_PIN10

#defineGDO23//2 main, 5 remote, 3 M16

#defineGDO099

#defineCRYSTAL_FREQUENCY26000000

#defineCFG_REGISTER0x2F//47 registers

#defineFIFOBUFFER0x42//size of Fifo Buffer

#defineRSSI_OFFSET_868MHZ0x4E//dec = 74

#defineTX_RETRIES_MAX0x05//tx_retries_max

#defineACK_TIMEOUT200//ACK timeout in ms

#defineCC1100_COMPARE_REGISTER0x00//register compare 0=no compare 1=compare

#defineBROADCAST_ADDRESS0x00//broadcast address

#defineCC1100_FREQ_315MHZ0x01

#defineCC1100_FREQ_434MHZ0x02

#defineCC1100_FREQ_868MHZ0x03

#defineCC1100_FREQ_915MHZ0x04

#defineCC1100_FREQ_2430MHZ0x05

#defineCC1100_TEMP_ADC_MV3.225//3.3V/1023 . mV pro digit

#defineCC1100_TEMP_CELS_CO2.47//Temperature coefficient 2.47mV per Grad Celsius

#defineWRITE_SINGLE_BYTE0x00

#defineWRITE_BURST0x40

#defineREAD_SINGLE_BYTE0x80

#defineREAD_BURST0xC0

#defineTXFIFO_BURST0x7F//write burst only

#defineTXFIFO_SINGLE_BYTE0x3F//write single only

#defineRXFIFO_BURST0xFF//read burst only

#defineRXFIFO_SINGLE_BYTE0xBF//read single only

#definePATABLE_BURST0x7E//power control read/write

#definePATABLE_SINGLE_BYTE0xFE//power control read/write

#defineIOCFG20x00// GDO2 output pin configuration

#defineIOCFG10x01// GDO1 output pin configuration

#defineIOCFG00x02// GDO0 output pin configuration

#defineFIFOTHR0x03// RX FIFO and TX FIFO thresholds

#defineSYNC10x04// Sync word, high byte

#defineSYNC00x05// Sync word, low byte

#definePKTLEN0x06// Packet length

#definePKTCTRL10x07// Packet automation control

#definePKTCTRL00x08// Packet automation control

#defineADDR0x09// Device address

#defineCHANNR0x0A// Channel number

#defineFSCTRL10x0B// Frequency synthesizer control

#defineFSCTRL00x0C// Frequency synthesizer control

#defineFREQ20x0D// Frequency control word, high byte

#defineFREQ10x0E// Frequency control word, middle byte

#defineFREQ00x0F// Frequency control word, low byte

#defineMDMCFG40x10// Modem configuration

#defineMDMCFG30x11// Modem configuration

#defineMDMCFG20x12// Modem configuration

#defineMDMCFG10x13// Modem configuration

#defineMDMCFG00x14// Modem configuration

#defineDEVIATN0x15// Modem deviation setting

#defineMCSM20x16// Main Radio Cntrl State Machine config

#defineMCSM10x17// Main Radio Cntrl State Machine config

#defineMCSM00x18// Main Radio Cntrl State Machine config

#defineFOCCFG0x19// Frequency Offset Compensation config

#defineBSCFG0x1A// Bit Synchronization configuration

#defineAGCCTRL20x1B// AGC control

#defineAGCCTRL10x1C// AGC control

#defineAGCCTRL00x1D// AGC control

#defineWOREVT10x1E// High byte Event 0 timeout

#defineWOREVT00x1F// Low byte Event 0 timeout

#defineWORCTRL0x20// Wake On Radio control

#defineFREND10x21// Front end RX configuration

#defineFREND00x22// Front end TX configuration

#defineFSCAL30x23// Frequency synthesizer calibration

#defineFSCAL20x24// Frequency synthesizer calibration

#defineFSCAL10x25// Frequency synthesizer calibration

#defineFSCAL00x26// Frequency synthesizer calibration

#defineRCCTRL10x27// RC oscillator configuration

#defineRCCTRL00x28// RC oscillator configuration

#defineFSTEST0x29// Frequency synthesizer cal control

#definePTEST0x2A// Production test

#defineAGCTEST0x2B// AGC test

#defineTEST20x2C// Various test settings

#defineTEST10x2D// Various test settings

#defineTEST00x2E// Various test settings

#defineSRES0x30// Reset chip

#defineSFSTXON0x31// Enable/calibrate freq synthesizer

#defineSXOFF0x32// Turn off crystal oscillator.

#defineSCAL0x33// Calibrate freq synthesizer & disable

#defineSRX0x34// Enable RX.

#defineSTX0x35// Enable TX.

#defineSIDLE0x36// Exit RX / TX

#defineSAFC0x37// AFC adjustment of freq synthesizer

#defineSWOR0x38// Start automatic RX polling sequence

#defineSPWD0x39// Enter pwr down mode when CSn goes hi

#defineSFRX0x3A// Flush the RX FIFO buffer.

#defineSFTX0x3B// Flush the TX FIFO buffer.

#defineSWORRST0x3C// Reset real time clock.

#defineSNOP0x3D// No operation.

#definePARTNUM0xF0// Part number

#defineVERSION0xF1// Current version number

#defineFREQEST0xF2// Frequency offset estimate

#defineLQI0xF3// Demodulator estimate for link quality

#defineRSSI0xF4// Received signal strength indication

#defineMARCSTATE0xF5// Control state machine state

#defineWORTIME10xF6// High byte of WOR timer

#defineWORTIME00xF7// Low byte of WOR timer

#definePKTSTATUS0xF8// Current GDOx status and packet status

#defineVCO_VC_DAC0xF9// Current setting from PLL cal module

#defineTXBYTES0xFA// Underflow and # of bytes in TXFIFO

#defineRXBYTES0xFB// Overflow and # of bytes in RXFIFO

#defineRCCTRL1_STATUS0xFC//Last RC Oscillator Calibration Result

#defineRCCTRL0_STATUS0xFD//Last RC Oscillator Calibration Result

{

voidspi_begin(void);

voidspi_end(void);

uint8_tspi_putc(uint8_t data);

uint8_t debug_level;

uint8_tset_debug_level(uint8_t set_debug_level);

uint8_tget_debug_level(void);

uint8_tbegin(volatileuint8_t &My_addr);

voidend(void);

voidspi_write_strobe(uint8_t spi_instr);

voidspi_write_register(uint8_t spi_instr,uint8_t value);

voidspi_write_burst(uint8_t spi_instr,uint8_t *pArr,uint8_t length);

voidspi_read_burst(uint8_t spi_instr,uint8_t *pArr,uint8_t length);

uint8_tspi_read_register(uint8_t spi_instr);

uint8_tspi_read_status(uint8_t spi_instr);

voidreset(void);

voidwakeup(void);

voidpowerdown(void);

voidwor_enable(void);

voidwor_disable(void);

voidwor_reset(void);

uint8_tsidle(void);

uint8_ttransmit(void);

uint8_treceive(void);

voidshow_register_settings(void);

voidshow_main_settings(void);

uint8_tpacket_available();

uint8_twait_for_packet(uint16_t milliseconds);

uint8_tget_payload(uint8_t rxbuffer[],uint8_t &pktlen_rx,uint8_t &my_addr,

uint8_t &sender,int8_t &rssi_dbm,uint8_t &lqi);

uint8_ttx_payload_burst(uint8_t my_addr,uint8_t rx_addr,uint8_t *txbuffer,uint8_t length);

uint8_trx_payload_burst(uint8_t rxbuffer[],uint8_t &pktlen);

voidrx_fifo_erase(uint8_t *rxbuffer);

voidtx_fifo_erase(uint8_t *txbuffer);

uint8_tsent_packet(uint8_t my_addr,uint8_t rx_addr,uint8_t *txbuffer,uint8_t pktlen,uint8_t tx_retries);

voidsent_acknowledge(uint8_t my_addr,uint8_t tx_addr);

uint8_tcheck_acknowledge(uint8_t *rxbuffer,uint8_t pktlen,uint8_t sender,uint8_t my_addr);

int8_trssi_convert(uint8_t Rssi);

uint8_tcheck_crc(uint8_t lqi);

uint8_tlqi_convert(uint8_t lqi);

uint8_tget_temp(uint8_t *ptemp_Arr);

voidset_myaddr(uint8_t addr);

voidset_channel(uint8_t channel);

voidset_ISM(uint8_t ism_freq);

voidset_mode(uint8_t mode);

voidset_output_power_level(int8_t dbm);

voidset_patable(uint8_t *patable_arr);

voidset_fec(uint8_t cfg);

voidset_data_whitening(uint8_t cfg);

voidset_modulation_type(uint8_t cfg);

voidset_preamble_len(uint8_t cfg);

voidset_manchester_encoding(uint8_t cfg);

voidset_sync_mode(uint8_t cfg);

voidset_datarate(uint8_t mdmcfg4,uint8_t mdmcfg3,uint8_t deviant);

voiduart_puthex_nibble(constunsignedchar b);

voiduart_puthex_byte(constunsignedchar b);

voiduart_puti(constint val);

};

#endif// CC1100_H