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Commit01cee31

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author
Shikang Fan
committed
drm/amdgpu: Add sriov vf check for VCN per queue reset support.
Add SRIOV check when setting VCN ring's supported reset mask.Signed-off-by: Shikang Fan <shikang.fan@amd.com>Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
1 parent6fbeb59 commit01cee31

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2 files changed

+4
-2
lines changed

2 files changed

+4
-2
lines changed

‎drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,7 @@ static int vcn_v4_0_3_late_init(struct amdgpu_ip_block *ip_block)
141141
adev->vcn.supported_reset=
142142
amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
143143

144-
if (amdgpu_dpm_reset_vcn_is_supported(adev))
144+
if (amdgpu_dpm_reset_vcn_is_supported(adev)&& !amdgpu_sriov_vf(adev))
145145
adev->vcn.supported_reset |=AMDGPU_RESET_TYPE_PER_QUEUE;
146146

147147
return0;

‎drivers/gpu/drm/amd/amdgpu/vcn_v5_0_1.c‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,9 @@ static int vcn_v5_0_1_late_init(struct amdgpu_ip_block *ip_block)
122122

123123
switch (amdgpu_ip_version(adev,MP0_HWIP,0)) {
124124
caseIP_VERSION(13,0,12):
125-
if ((adev->psp.sos.fw_version >=0x00450025)&&amdgpu_dpm_reset_vcn_is_supported(adev))
125+
if ((adev->psp.sos.fw_version >=0x00450025)&&
126+
amdgpu_dpm_reset_vcn_is_supported(adev)&&
127+
!amdgpu_sriov_vf(adev))
126128
adev->vcn.supported_reset |=AMDGPU_RESET_TYPE_PER_QUEUE;
127129
break;
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default:

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