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[None][feat] Optimize kv cache transfer TEP#7613

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@chuangz0chuangz0 commentedSep 8, 2025
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Summary by CodeRabbit

  • New Features

    • None
  • Bug Fixes

    • Corrected cache transfer routing in multi-GPU Data Parallel setups to align sends/receives with DP ranks.
    • Fixed incorrect “need to send” decisions when DP is disabled, improving correctness across configurations.
  • Refactor

    • Streamlined DP-aware logic and added early exits to avoid unnecessary cache allocation and transfers, reducing overhead.
  • Tests

    • Expanded coverage for DP-enabled and DP-disabled scenarios across MLA and non-MLA cases with updated expectations.

Description

When context TEP and gen DEP, each dp rank of gen will request kv cache from context tp rank0 before.
We changed it so that dp rank will request kv cache from context tp_rank = gen_dp_rank%tp_num.
needTRTLLM_PARALLEL_CACHE_SEND=1

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@chuangz0chuangz0 requested review fromShixiaowei02 andShunkangz and removed request forTabrizian andpcastonguaySeptember 8, 2025 10:31
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📝 Walkthrough

Walkthrough

Adds DP-rank–aware gating for KV-cache send/recv in cache formatting paths, aligning senders and receivers by DupHeadFactor and DP ranks. Updates recipient selection logic, introduces early return when no send is needed, and extends/adjusts unit tests for MLA and non-MLA scenarios with DP enabled/disabled.

Changes

Cohort / File(s)Summary of changes
DP-aware send/recv gating and routing
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp,cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp
needSendCache now aligns self/destination DP ranks with DupHeadFactor; adds DP-aware recipient selection in pickRecvConnections; mlaCacheFormatter adds dpRank-based target mapping and an early return in format() when no send is needed; comments updated; no public API changes.
Unit tests: DP scenarios and expectations
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp
Adds parameterized DP-enabled MLA tests; adds NoMLA duplicate instantiations; updates expected needSend flags when DP is disabled across several contexts; increases coverage for asymmetric and DP-aware flows.

Sequence Diagram(s)

sequenceDiagram  autonumber  participant Caller  participant CacheFormatter  participant Cluster as DP/TP/PP Config  participant Network  Caller->>CacheFormatter: format(request)  CacheFormatter->>Cluster: get self/dest ranks, DupHeadFactor  CacheFormatter->>CacheFormatter: needSendCache(self, dest, DupHeadFactor)  alt needSendCache == false    CacheFormatter-->>Caller: return (no allocation/send)  else needSendCache == true    CacheFormatter->>CacheFormatter: pickRecvConnections(selfDP, PeerDupHeadFactor)    CacheFormatter->>Network: send KV-cache to selected peers    Network-->>CacheFormatter: ack    CacheFormatter-->>Caller: return  end  note over CacheFormatter,Network: Gating uses (destDPRank % DupHeadFactor) == (selfTpRankInDpGroup % DupHeadFactor).<br/>Recipient selection uses (i % PeerDupHeadFactor) == (selfDPRank % PeerDupHeadFactor).
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sequenceDiagram  autonumber  participant Caller  participant MLACacheFormatter as MLA CacheFormatter  participant Cluster as DP/TP/PP Config  participant Network  Caller->>MLACacheFormatter: format(request)  MLACacheFormatter->>Cluster: read self/dest TP/DP/PP, DupHeadFactor  MLACacheFormatter->>MLACacheFormatter: needSendCache(...) with DP-aware checks  alt no send    MLACacheFormatter-->>Caller: return  else send    MLACacheFormatter->>MLACacheFormatter: pickRecvConnections(dpRank-offset mapping)    MLACacheFormatter->>Network: send KV-cache to DP/PP-aligned targets    Network-->>MLACacheFormatter: ack    MLACacheFormatter-->>Caller: return  end  note over MLACacheFormatter: targetInfo mapping uses dpRank offset and mDomainTPSize for recipient indices.
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Estimated code review effort

🎯 4 (Complex) | ⏱️ ~60 minutes

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Actionable comments posted: 2

Caution

Some comments are outside the diff and can’t be posted inline due to platform limitations.

⚠️ Outside diff range comments (3)
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (1)

173-206:Layer-wise send to all connections may deadlock with DP-filtered recv.

unformat() receives only frompickRecvConnections(...); here the layer-wise path always sends on every connection index, which can block when the peer won’trecv some indices under DP gating.

  • Restrict sends to a DP-aligned subset (mirrorpickRecvConnections mapping for the destination).
  • Or introduce apickSendConnections(...) helper and use it in both layer-wise and non-layer-wise paths.
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp (2)

163-179:Send only to DP-aligned subset; current code risks over-sending and stalls.

pickRecvConnections(...) narrows receivers toPP-domain entries for the chosen TP slice, butformat() sends on every connection index. Limit sends to the same subset derived fromdestDPRank to prevent unmatched sends.

@@-    auto targetInfo = executor::kv_cache::targetIRanks(destConfig, selfConfig, selfIdx);+    auto targetInfo = executor::kv_cache::targetIRanks(destConfig, selfConfig, selfIdx);@@-    size_t const pPDomainSize = targetInfo.mDomainPPSize;+    size_t const pPDomainSize = targetInfo.mDomainPPSize;     TLLM_CHECK((cacheBlockSize * blockNum) % pPDomainSize == 0);     auto const targetBufferSize = (cacheBlockSize * blockNum) / pPDomainSize;@@     auto* agentConnnecion = dynamic_cast<executor::kv_cache::AgentConnection const*>(connections[0]);@@-    // The size of outputSplitCaches should be equal to pPDomainSize+    // The size of outputSplitCaches should be equal to pPDomainSize+    // Compute sender indices aligned with the destination DP rank: [tpOffset .. tpOffset+ppSize)+    std::vector<size_t> sendIndices;+    {+        int destDpRank = destConfig.getParallelConfig().mEnableAttentionDP ? destConfig.getParallelConfig().mDPrank : 0;+        size_t const tpOffset = (destDpRank % targetInfo.mDomainTPSize) * targetInfo.mDomainPPSize;+        sendIndices.resize(pPDomainSize);+        std::iota(sendIndices.begin(), sendIndices.end(), tpOffset);+    }@@-    if (connections.size() > 1)+    if (sendIndices.size() > 1)     {         if (!common::getEnvEnableReceiveKVCacheParallel())         {             TLLM_LOG_DEBUG("Disable parallel receiving of the KV cache.");-            for (size_t i = 0; i < connections.size(); i++)+            for (size_t i = 0; i < sendIndices.size(); i++)             {-                sendBufferFun(deviceId, i);+                sendBufferFun(deviceId, sendIndices[i]);             }         }         else         {             // concurrency num-            auto concurrencyNum = std::min(std::max(static_cast<size_t>(1), bufferCoverTargetNum), pPDomainSize);+            auto concurrencyNum = std::min(std::max(static_cast<size_t>(1), bufferCoverTargetNum), sendIndices.size());-            auto remainSendNum = connections.size();+            auto remainSendNum = sendIndices.size();              while (remainSendNum > 0)             {                 auto sendConcurrencyNum = std::min(remainSendNum, concurrencyNum);                 std::vector<std::future<void>> futures;                 futures.reserve(sendConcurrencyNum);-                for (size_t i = 0; i < sendConcurrencyNum; i++)+                for (size_t i = 0; i < sendConcurrencyNum; i++)                 {-                    TLLM_CHECK((i + (connections.size() - remainSendNum)) < connections.size());-                    futures.push_back(std::async(-                        std::launch::async, sendBufferFun, deviceId, i + (connections.size() - remainSendNum)));+                    size_t idx = i + (sendIndices.size() - remainSendNum);+                    TLLM_CHECK(idx < sendIndices.size());+                    futures.push_back(std::async(std::launch::async, sendBufferFun, deviceId, sendIndices[idx]));                 }                 for (auto& future : futures)                 {                     future.get();                 }                 remainSendNum -= sendConcurrencyNum;             }         }     }     else     {-        sendBufferFun(deviceId, 0);+        TLLM_CHECK(!sendIndices.empty());+        sendBufferFun(deviceId, sendIndices[0]);     }

Also applies to: 250-289


563-568:Bug: comparesselfConfig twice; should comparedestConfig for MLA head count.

This always evaluates the same side and misses invalid dest configs.

-    if ((selfConfig.getModelConfig().mNbKvHeadsPerLayer.at(0) != 1)-        || (selfConfig.getModelConfig().mNbKvHeadsPerLayer.at(0) != 1))+    if ((selfConfig.getModelConfig().mNbKvHeadsPerLayer.at(0) != 1)+        || (destConfig.getModelConfig().mNbKvHeadsPerLayer.at(0) != 1))     {         TLLM_LOG_WARNING("MLACacheFormatter::inquireSupport: only support MLA");         return false;     }
🧹 Nitpick comments (3)
cpp/tensorrt_llm/batch_manager/cacheFormatter.cpp (1)

131-137:Receiver-subset sanity check.

Nice DP-aware filter. Add an assertion to catch topology mismatches early.

@@   TLLM_CHECK(numConnections == targetInfo.mIRanks.size());   int selfDPRank = selfConfig.getParallelConfig().mEnableAttentionDP ? selfConfig.getParallelConfig().mDPrank : 0;    std::vector<size_t> ret;   for (int i = 0; i < targetInfo.mDomainTPSize; i++)   {     if ((i % targetInfo.mPeerDupHeadFactor) == (selfDPRank % targetInfo.mPeerDupHeadFactor))     {       for (int j = 0; j < targetInfo.mDomainPPSize; j++)       {         ret.push_back((i * targetInfo.mDomainPPSize) + j);       }     }   }+  TLLM_CHECK(ret.size() * targetInfo.mPeerDupHeadFactor == numConnections);   return ret;
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp (1)

1-1:Set required env for parallel send path in tests.

PR requiresTRTLLM_PARALLEL_CACHE_SEND=1. Consider setting it once in the test fixture setup to avoid accidental regressions on CI.

Example (add toAsymmetricalCacheTest::setUpCacheTransceiver() before creating connection manager):

@@     void setUpCacheTransceiver()     {+        setenv("TRTLLM_PARALLEL_CACHE_SEND", "1", 1);         if (!(mIsContext || mIsGeneration))         {             return;         }
cpp/tensorrt_llm/batch_manager/mlaCacheFormatter.cpp (1)

48-54:Recv-indexing aligned to DP rank; add sanity checks.

Add a bound/assert to ensure we get exactly PP-domain connections and avoid surprises if topology changes.

@@-    // targetInfo , mRanks [tpranks, ppranks]+    // targetInfo.mIRanks is laid out as [tpRanks, ppRanks]     int dpRank = selfConfig.getParallelConfig().mEnableAttentionDP ? selfConfig.getParallelConfig().mDPrank : 0;      for (int i = 0; i < targetInfo.mDomainPPSize; i++)     {         ret.push_back(i + (dpRank % (targetInfo.mDomainTPSize)) * targetInfo.mDomainPPSize);     }+    TLLM_CHECK(ret.size() == static_cast<size_t>(targetInfo.mDomainPPSize));     return ret;
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📚 Learning: 2025-08-21T09:41:49.347Z
Learnt from: eopXDPR: NVIDIA/TensorRT-LLM#6768File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:2010-2045Timestamp: 2025-08-21T09:41:49.347ZLearning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, updateSequenceCacheBlockOffsets is specifically for updating bookkeeping when blocks are added during the context phase, not for refreshing offsets after detach operations. During detach operations, GenerationRequest::removeFrontBlock handles the necessary cache block bookkeeping internally.

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📚 Learning: 2025-08-20T06:48:45.368Z
Learnt from: eopXDPR: NVIDIA/TensorRT-LLM#6768File: cpp/include/tensorrt_llm/batch_manager/kvCacheManager.h:0-0Timestamp: 2025-08-20T06:48:45.368ZLearning: In cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, updateSequenceCacheBlockOffsets is only called when adding a sequence, not during detach operations. During detach, the cache block bookkeeping is handled by GenerationRequest::removeFrontBlock.

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📚 Learning: 2025-08-14T21:04:50.248Z
Learnt from: thorjohnsenPR: NVIDIA/TensorRT-LLM#6910File: cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp:0-0Timestamp: 2025-08-14T21:04:50.248ZLearning: In KV cache onboarding logic during prefill in cpp/tensorrt_llm/batch_manager/kvCacheManager.cpp, when calculating which blocks fall within the attention window, use getTokensPerBlock() to advance token indices rather than block->getUniqueTokens().size(), because the calculation needs to consider the post-prefill state where blocks will be filled to capacity, not their current token count.

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🔇 Additional comments (3)
cpp/tests/unit_tests/multi_gpu/cacheTransceiverTest.cpp (3)

1389-1399:New MLA+DP test matrix: good coverage.

Instantiation looks fine and expands asymmetric cases.


1435-1439:Additional NoMLA duplicate DP case: good.

Complements the previous duplicate scenarios.


1809-1816:Expectation flips match DP-rank–aligned gating.

The true/false flips are consistent withneedSendCache usingdestDPRank % dupHeadFactor == ....

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PR_Github #18035 [ run ] completed with stateSUCCESS
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@chuangz0chuangz0force-pushed theopt_gen_dp_ctx_tp_cache_transfer_2 branch from64b71e2 toca88ef4CompareSeptember 9, 2025 02:54
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@chuangz0chuangz0 requested a review froma team as acode ownerSeptember 16, 2025 09:34
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PR_Github #18886 [ run ] completed with stateSUCCESS
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PR_Github #18936 [ run ] completed with stateSUCCESS
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PR_Github #19744 [ run ] completed with stateFAILURE
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Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
@chuangz0chuangz0force-pushed theopt_gen_dp_ctx_tp_cache_transfer_2 branch frombac5cec to5c7e1a4CompareSeptember 25, 2025 01:41
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/bot run --only-multi-gpu-test

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PR_Github #19863 [ run ] triggered by Bot

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PR_Github #19863 [ run ] completed with stateSUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14948(Partly Tested) completed with status: 'FAILURE'

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/bot run --stage-list "DGX_H100-4_GPUs-CPP-1"

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PR_Github #19914 [ run ] triggered by Bot

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PR_Github #19914 [ run ] completed with stateSUCCESS
/LLM/main/L0_MergeRequest_PR pipeline #14990(Partly Tested) completed with status: 'SUCCESS'
Pipeline passed with automatic retried tests. Check thererun report for details.

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/bot skip --comment "all CI tests has passed"

@chuangz0chuangz0 changed the title[None][chore] optimize kv cache transfer for context TEP and gen DEP[None][chore] Optimize kv cache transfer for context TEP and gen DEPSep 26, 2025
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PR_Github #20026 [ skip ] triggered by Bot

@chuangz0chuangz0 changed the title[None][chore] Optimize kv cache transfer for context TEP and gen DEP[None][feat] Optimize kv cache transfer for context TEP and gen DEPSep 26, 2025
@chuangz0chuangz0 changed the title[None][feat] Optimize kv cache transfer for context TEP and gen DEP[None][feat] Optimize kv cache transfer TEPSep 26, 2025
@chuangz0chuangz0enabled auto-merge (squash)September 26, 2025 03:08
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PR_Github #20026 [ skip ] completed with stateSUCCESS
Skipping testing for commit5c7e1a4

@chuangz0chuangz0 merged commitf98fa0c intoNVIDIA:mainSep 26, 2025
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symphonylyh pushed a commit to symphonylyh/TensorRT-LLM that referenced this pull requestOct 15, 2025
Signed-off-by: Chuang Zhu <111838961+chuangz0@users.noreply.github.com>
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@Shixiaowei02Shixiaowei02Shixiaowei02 approved these changes

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@chzblychchzblychAwaiting requested review from chzblychchzblych is a code owner automatically assigned from NVIDIA/trt-llm-doc-owners

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