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9 Sizes and offsets as runtime invariants ¶

GCC allows the size of a hardware register to be a runtime invariantrather than a compile-time constant. This in turn means that varioussizes and offsets must also be runtime invariants rather thancompile-time constants, such as:

• the size of a generalmachine_mode (seeMachine Modes);
• the size of a spill slot;
• the offset of something within a stack frame;
• the number of elements in a vector;
• the size and offset of amem rtx (seeRegisters and Memory); and
• the byte offset in asubreg rtx (seeRegisters and Memory).

The motivating example is the Arm SVE ISA, whose vector registers can beany multiple of 128 bits between 128 and 2048 inclusive. The compilernormally produces code that works for all SVE register sizes, with theactual size only being known at runtime.

GCC’s main representation of such runtime invariants is thepoly_int class. This chapter describes whatpoly_intdoes, lists the available operations, and gives some generalusage guidelines.

• Overview ofpoly_int
• Consequences of usingpoly_int
• Comparisons involvingpoly_int
• Arithmetic onpoly_ints
• Alignment ofpoly_ints
• Computing bounds onpoly_ints
• Convertingpoly_ints
• Miscellaneouspoly_int routines
• Guidelines for usingpoly_int