On many machines, the condition code may be produced by other instructionsthan compares, for example the branch can use directly the conditioncode set by a subtract instruction. However, on some machineswhen the condition code is set this way some bits (such as the overflowbit) are not set in the same way as a test instruction, so that a differentbranch instruction must be used for some conditional branches. Whenthis happens, use the machine mode of the condition code register torecord different formats of the condition code register. Modes canalso be used to record which compare instruction (e.g. a signed or anunsigned comparison) produced the condition codes.
If other modes thanCCmode are required, add them tomachine-modes.def and defineSELECT_CC_MODE to choosea mode given an operand of a compare. This is needed because the modeshave to be chosen not only during RTL generation but also, for example,by instruction combination. The result ofSELECT_CC_MODE shouldbe consistent with the mode used in the patterns; for example to supportthe case of the add on the SPARC discussed above, we have the pattern
(define_insn "" [(set (reg:CCNZ 0) (compare:CCNZ (plus:SI (match_operand:SI 0 "register_operand" "%r") (match_operand:SI 1 "arith_operand" "rI")) (const_int 0)))] "" "…")
together with aSELECT_CC_MODE that returnsCCNZmodefor comparisons whose argument is aplus:
#define SELECT_CC_MODE(OP,X,Y) \ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ ? ((OP == LT || OP == LE || OP == GT || OP == GE) \ ? CCFPEmode : CCFPmode) \ : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \ || GET_CODE (X) == NEG || GET_CODE (x) == ASHIFT) \ ? CCNZmode : CCmode))
Another reason to use modes is to retain information on which operandswere used by the comparison; seeREVERSIBLE_CC_MODE later inthis section.
You should define this macro if and only if you define extra CC modesinmachine-modes.def.
voidTARGET_CANONICALIZE_COMPARISON(int *code, rtx *op0, rtx *op1, boolop0_preserve_value) ¶On some machines not all possible comparisons are defined, but you canconvert an invalid comparison into a valid one. For example, the Alphadoes not have aGT comparison, but you can use anLTcomparison instead and swap the order of the operands.
On such machines, implement this hook to do any required conversions.code is the initial comparison code andop0 andop1are the left and right operands of the comparison, respectively. Ifop0_preserve_value istrue the implementation is notallowed to change the value ofop0 since the value might be usedin RTXs which aren’t comparisons. E.g. the implementation is notallowed to swap operands in that case.
GCC will not assume that the comparison resulting from this macro isvalid but will see if the resulting insn matches a pattern in themd file.
You need not to implement this hook if it would never change thecomparison code or operands.
A C expression whose value is one if it is always safe to reverse acomparison whose mode ismode. IfSELECT_CC_MODEcan ever returnmode for a floating-point inequality comparison,thenREVERSIBLE_CC_MODE (mode) must be zero.
You need not define this macro if it would always returns zero or if thefloating-point format is anything other thanIEEE_FLOAT_FORMAT.For example, here is the definition used on the SPARC, where floating-pointinequality comparisons are given eitherCCFPEmode orCCFPmode:
#define REVERSIBLE_CC_MODE(MODE) \ ((MODE) != CCFPEmode && (MODE) != CCFPmode)
A C expression whose value is reversed condition code of thecode forcomparison done in CC_MODEmode. The macro is used only in caseREVERSIBLE_CC_MODE (mode) is nonzero. Define this macro in casemachine has some non-standard way how to reverse certain conditionals. Forinstance in case all floating point conditions are non-trapping, compiler mayfreely convert unordered compares to ordered ones. Then definition may looklike:
#define REVERSE_CONDITION(CODE, MODE) \ ((MODE) != CCFPmode ? reverse_condition (CODE) \ : reverse_condition_maybe_unordered (CODE))
boolTARGET_FIXED_CONDITION_CODE_REGS(unsigned int *p1, unsigned int *p2) ¶On targets which use a hardregister rather than a pseudo-register to hold condition codes, theregular CSE passes are often not able to identify cases in which thehard register is set to a common value. Use this hook to enable asmall pass which optimizes such cases. This hook should return trueto enable this pass, and it should set the integers to which itsarguments point to the hard register numbers used for condition codes.When there is only one such register, as is true on most systems, theinteger pointed to byp2 should be set toINVALID_REGNUM.
The default version of this hook returns false.
machine_modeTARGET_CC_MODES_COMPATIBLE(machine_modem1, machine_modem2) ¶On targets which use multiple condition code modes in classMODE_CC, it is sometimes the case that a comparison can bevalidly done in more than one mode. On such a system, define thistarget hook to take two mode arguments and to return a mode in whichboth comparisons may be validly done. If there is no such mode,returnVOIDmode.
The default version of this hook checks whether the modes are thesame. If they are, it returns that mode. If they are different, itreturnsVOIDmode.
unsigned intTARGET_FLAGS_REGNUM ¶If the target has a dedicated flags register, and it needs to use thepost-reload comparison elimination pass, or the delay slot filler pass,then this value should be set appropriately.