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16.15 Canonicalization of Instructions ¶

There are often cases where multiple RTL expressions could represent anoperation performed by a single machine instruction. This situation ismost commonly encountered with logical, branch, and multiply-accumulateinstructions. In such cases, the compiler attempts to convert thesemultiple RTL expressions into a single canonical form to reduce thenumber of insn patterns required.

In addition to algebraic simplifications, following canonicalizationsare performed:

• For commutative and comparison operators, a constant is always made thesecond operand. If a machine only supports a constant as the secondoperand, only patterns that match a constant in the second operand needbe supplied.
• For thevec_merge with constant mask(the third operand), the firstand the second operand can be exchanged by inverting the mask. In such cases,a constant is always made the second operand, otherwise the least significantbit of the mask is always set(select the first operand first).
• For associative operators, a sequence of operators will always chainto the left; for instance, only the left operand of an integerpluscan itself be aplus.and,ior,xor,plus,mult,smin,smax,umin, andumax are associative when applied to integers, and sometimes tofloating-point.
• For these operators, if only one operand is aneg,not,mult,plus, orminus expression, it will be thefirst operand.
• In combinations ofneg,mult,plus, andminus, theneg operations (if any) will be moved insidethe operations as far as possible. For instance,(neg (mult A B)) is canonicalized as(mult (neg A) B), but(plus (mult (neg B) C) A) is canonicalized as(minus A (mult B C)).
• For thecompare operator, a constant is always the second operandif the first argument is a condition code register.
• For instructions that inherently set a condition code register, thecompare operator is always written as the first RTL expression oftheparallel instruction pattern. For example,

  (define_insn ""  [(set (reg:CCZ FLAGS_REG)(compare:CCZ  (plus:SI    (match_operand:SI 1 "register_operand" "%r")    (match_operand:SI 2 "register_operand" "r"))  (const_int 0)))   (set (match_operand:SI 0 "register_operand" "=r")(plus:SI (match_dup 1) (match_dup 2)))]  ""  "addl %0, %1, %2")

• An operand ofneg,not,mult,plus, orminus is made the first operand under the same conditions asabove.
• (ltu (plusab)b) is converted to(ltu (plusab)a). Likewise withgeu insteadofltu.
• (minusx (const_intn)) is converted to(plusx (const_int-n)).
• Within address computations (i.e., insidemem), a left shift isconverted into the appropriate multiplication by a power of two.
• De Morgan’s Law is used to move bitwise negation inside a bitwiselogical-and or logical-or operation. If this results in only oneoperand being anot expression, it will be the first one.

  A machine that has an instruction that performs a bitwise logical-and of oneoperand with the bitwise negation of the other should specify the patternfor that instruction as

  (define_insn ""  [(set (match_operand:m 0 …)        (and:m (not:m (match_operand:m 1 …))                     (match_operand:m 2 …)))]  "…"  "…")

  Similarly, a pattern for a “NAND” instruction should be written

  (define_insn ""  [(set (match_operand:m 0 …)        (ior:m (not:m (match_operand:m 1 …))                     (not:m (match_operand:m 2 …))))]  "…"  "…")

  In both cases, it is not necessary to include patterns for the manylogically equivalent RTL expressions.

• The only possible RTL expressions involving both bitwise exclusive-orand bitwise negation are(xor:mxy)and(not:m (xor:mxy)).
• The sum of three items, one of which is a constant, will only appear inthe form

  (plus:m (plus:mxy)constant)

• Equality comparisons of a group of bits (usually a single bit) with zerowill be written usingzero_extract rather than the equivalentand orsign_extract operations.
• (sign_extend:m1 (mult:m2 (sign_extend:m2x)(sign_extend:m2y))) is converted to(mult:m1(sign_extend:m1x) (sign_extend:m1y)), and likewiseforzero_extend.
• (sign_extend:m1 (mult:m2 (ashiftrt:m2xs) (sign_extend:m2y))) is convertedto(mult:m1 (sign_extend:m1 (ashiftrt:m2xs)) (sign_extend:m1y)), and likewise forpatterns usingzero_extend andlshiftrt. If the secondoperand ofmult is also a shift, then that is extended also.This transformation is only applied when it can be proven that theoriginal operation had sufficient precision to prevent overflow.

Further canonicalization rules are defined in the functioncommutative_operand_precedence ingcc/rtlanal.cc.

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