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Six special side-effect expression codes appear as memory addresses.
(pre_dec:mx) ¶Represents the side effect of decrementingx by a standardamount and represents also the value thatx has after beingdecremented.x must be areg ormem, but mostmachines allow only areg.m must be the machine modefor pointers on the machine in use. The amountx is decrementedby is the length in bytes of the machine mode of the containing memoryreference of which this expression serves as the address. Here is anexample of its use:
(mem:DF (pre_dec:SI (reg:SI 39)))
This says to decrement pseudo register 39 by the length of aDFmodevalue and use the result to address aDFmode value.
(pre_inc:mx) ¶Similar, but specifies incrementingx instead of decrementing it.
(post_dec:mx) ¶Represents the same side effect aspre_dec but a differentvalue. The value represented here is the valuex hasbeforebeing decremented.
(post_inc:mx) ¶Similar, but specifies incrementingx instead of decrementing it.
(post_modify:mxy) ¶Represents the side effect of settingx toy andrepresentsx beforex is modified.x must be areg ormem, but most machines allow only areg.m must be the machine mode for pointers on the machine in use.
The expressiony must be one of three forms:(plus:mxz),(minus:mxz), or(plus:mxi),wherez is an index register andi is a constant.
Here is an example of its use:
(mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42) (reg:SI 48))))
This says to modify pseudo register 42 by adding the contents of pseudoregister 48 to it, after the use of what ever 42 points to.
(pre_modify:mxexpr) ¶Similar except side effects happen before the use.
These embedded side effect expressions must be used with care. Instructionpatterns may not use them. Until the ‘flow’ pass of the compiler,they may occur only to represent pushes onto the stack. The ‘flow’pass finds cases where registers are incremented or decremented in oneinstruction and used as an address shortly before or after; these cases arethen transformed to use pre- or post-increment or -decrement.
If a register used as the operand of these expressions is used inanother address in an insn, the original value of the register is used.Uses of the register outside of an address are not permitted within thesame insn as a use in an embedded side effect expression because suchinsns behave differently on different machines and hence must be treatedas ambiguous and disallowed.
An instruction that can be represented with an embedded side effectcould also be represented usingparallel containing an additionalset to describe how the address register is altered. This is notdone because machines that allow these operations at all typicallyallow them wherever a memory address is called for. Describing them asadditional parallel stores would require doubling the number of entriesin the machine description.
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