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3.21.52 Visium Options ¶

-mdebug ¶

Use this option when linking programs that perform file I/O and aredestined to run on an MCM target. It causes the librarieslibc.a andlibdebug.a to be linked. You should run programon the the target under the control of the GDB remote debugging stub.

-msim ¶

Use this option when linking programs that perform file I/O and aredestined to run on the simulator. It causes the librarieslibc.a andlibsim.a to be linked.

-mfpu ¶

-mhard-float

Generate code containing floating-point instructions. This is thedefault.

-mno-fpu ¶

-msoft-float

Generate code containing library calls for floating-point.

-msoft-float changes the calling convention in the output file;therefore, it is only useful if you compileall of a program withthis option. In particular, you need to compilelibgcc.a, thelibrary that comes with GCC, with-msoft-float in order forthis to work.

-mcpu=cpu_type ¶

Set the instruction set, register set, and instruction scheduling parametersfor machine typecpu_type. Supported values forcpu_type are‘mcm’, ‘gr5’ and ‘gr6’.

‘mcm’ is a synonym of ‘gr5’ present for backward compatibility.

By default (unless configured otherwise), GCC generates code for the GR5variant of the Visium architecture.

With-mcpu=gr6, GCC generates code for the GR6 variant of the Visiumarchitecture. The only difference from GR5 code is that the compiler willgenerate block move instructions.

-mtune=cpu_type ¶

Set the instruction scheduling parameters for machine typecpu_type,but do not set the instruction set or register set that the option-mcpu=cpu_type would.

-msv-mode ¶

Generate code for the supervisor mode, where there are no restrictions onthe access to general registers. This is the default.

-muser-mode ¶

Generate code for the user mode, where the access to some general registersis forbidden: on the GR5, registers r24 to r31 cannot be accessed in thismode; on the GR6, only registers r29 to r31 are affected.