Visual Instruction Set, orVIS, is aSIMD instruction set extension forSPARC V9microprocessors developed bySun Microsystems. There are five versions of VIS: VIS 1, VIS 2, VIS 2+, VIS 3 and VIS 4.[1]
VIS 1 was introduced in 1994 and was first implemented by Sun in theirUltraSPARC microprocessor (1995) and by Fujitsu in theirSPARC64 GP microprocessors (2000).
VIS 2 was first implemented by theUltraSPARC III. All subsequent UltraSPARC and SPARC64 microprocessors implement the instruction set.
VIS 3 was first implemented in theSPARC T4 microprocessor.
VIS 4 was first implemented in theSPARC M7 microprocessor.
This article'sfactual accuracy isdisputed. Relevant discussion may be found on thetalk page. Please help to ensure that disputed statements arereliably sourced.(November 2017) (Learn how and when to remove this message) |
VIS is not an instruction toolkit likeIntel's MMX and SSE. MMX has only 8 registers shared with theFPU stack, while SPARC processors have 32 registers, also aliased to the double-precision (64-bit) floating point registers.
As with the SIMD instruction set extensions on otherRISC processors, VIS strictly conforms to the main principle of RISC: keep the instruction set concise and efficient.
This design is very different from comparable extensions onCISC processors, such asMMX,SSE,SSE2,SSE3,SSE4,3DNow!.
Sometimes, programmers must use several VIS instructions to accomplish an operation that can be done with only oneMMX orSSE instruction, but it should be kept in mind that fewer instructions do not automatically result in better performance.
VIS re-uses existing SPARC V9 64-bit floating point registers to hold multiple 8, 16, or 32-bit integer values. In this respect, VIS is more similar to the design ofMMX than other SIMD architectures such asSSE/SSE2/AltiVec.
VIS includes a number of operations primarily for graphics support, so most of them are only for integers. These include 3D to 2D conversion,edge processing and pixel distance.
There are four ways to use VIS in code: