Tick–tock was a production model adopted in 2007 bychip manufacturerIntel. Under this model, every new process technology was first used to manufacture adie shrink of a provenmicroarchitecture (tick), followed by a new microarchitecture on the now-proven process (tock). It was replaced by theprocess–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. More generally, tick–tock is an engineering model which refreshes one half of a binary system each release cycle.
Every "tick" represented ashrinking of the process technology of the previous microarchitecture (with minor changes, commonly to the caches, and rarely introducing new instructions, as withBroadwell in late 2014) and every "tock" designated a new microarchitecture.[1] These occurred roughly every year to 18 months.[1]
Due to the slowing rate of process improvements, in 2014 Intel created a "tock refresh" of atock in the form of a smaller update to the microarchitecture[2] not considered a new generation in and of itself. In March 2016, Intel announced in aForm 10-K report that it would always do this in future, deprecating the tick–tock cycle in favor of a three-step process–architecture–optimization model, under which three generations of processors are produced under a single manufacturing process, with the third generation out of three focusing on optimization.[3]
After introducing theSkylake architecture on a 14 nm process in 2015, its first optimization wasKaby Lake in 2016. Intel then announced a second optimization,Coffee Lake, in 2017[4] making a total of four generations at 14 nm[5] before thePalm Cove die shrink to 10 nm in 2018.
| Change (step) | Fabrication process | Micro- architecture | Code names for step | Intel Generation Desktop/Mobile | Intel Generation Xeon | Intel Microcode shortcut(s) Desktop/WS[6][7] | Intel Microcode shortcut(s) Xeon/Server | Release date | Processors | ||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 8P/4P Server | 4P/2P Server/WS | Embedded Xeon | 1P Xeon | Enthusiast/WS | Desktop | Mobile | |||||||||
| Tick (new fabrica- tion process) | 65 nm | P6,NetBurst | Yonah (P6), Presler (NetBurst), Cedar Mill (NetBurst) | — | 1995-11-1 (P6), 2000-11-20 (NetBurst) | — | — | — | Presler (NetBurst) | Cedar Mill (NetBurst) | Yonah (P6) | ||||
| Tock (new micro- architecture) | Core | Merom[8] | 2006-07-27[9][10] | Tigerton | Woodcrest Clovertown | Kentsfield | Conroe | Merom | |||||||
| Tick | 45 nm | Penryn | 2007-11-11[11] | Dunnington | Harpertown | Yorkfield | Wolfdale | Penryn | |||||||
| Tock | Nehalem | Nehalem | 1 | — | NHM[12] | — | 2008-11-17[13] | Beckton | Gainestown | Lynnfield | Bloomfield | Lynnfield | Clarksfield | ||
| Tick | 32 nm | Westmere | 1 | WSM[12] | 2010-01-04[14][15] | Westmere-EX | Westmere-EP | — | Gulftown | Clarkdale | Arrandale | ||||
| Tock | Sandy Bridge | Sandy Bridge | 2 | 1(E3/E5) | SNB | JKT (Jaketown) | 2011-01-09[16] | Skipped[17] | Sandy Bridge-EP | Gladden | Sandy Bridge | Sandy Bridge-E | Sandy Bridge | Sandy Bridge-M | |
| Tick | 22 nm[18] | Ivy Bridge | 3 | 2(E3/E5/E7) | IVB | IVT (Ivytown) | 2012-04-29 | Ivy Bridge-EX[19] | Ivy Bridge-EP[19] | Gladden | Ivy Bridge | Ivy Bridge-E[20] | Ivy Bridge | Ivy Bridge-M | |
| Tock | Haswell | Haswell | 4 | 3(E3/E5/E7) | HSW, CRW (Crystal Well) with Iris Pro[21][22] | HSX | 2013-06-02 | Haswell-EX | Haswell-EP | — | Haswell-DT | Haswell-E | Haswell-DT[23] | Haswell-MB (notebooks) Haswell-LP (ultrabooks)[23] | |
| Refresh | Haswell Refresh, Devil's Canyon[24] | — | — | 2014-05-11, 2014-06-02 | No server version released | Devil's Canyon | No mobile version released | ||||||||
| Tick (Process) | 14 nm[18] | Broadwell[25] | 5 | 4(E3/E5/E7) | BDW | BDX | 2014-09-05 | Broadwell-EX[26] | Broadwell-EP[26] | Broadwell-DE | Broadwell-DT | Broadwell-E | Broadwell-DT | Broadwell-H Broadwell-U Broadwell-Y | |
| Tock (Architecture) | Skylake[25] | Skylake[25] | 6 | 5(E3) 1(SP) W-2100 W-31xx | SKL SKL-S SKL-X SKL-H SKL-U SKL-Y SKL-D SKL-DT | SKX | 2015-08-05[27] | Skylake-SP | Skylake-DE | Skylake-D/DT/H | Skylake-X | Skylake | Skylake-H Skylake-U Skylake-Y | ||
| Optimization (Refresh) [3][28][29][30] | Kaby Lake[31] | 7 | 6(E3) | KBL | — | 2017-01-03[32] | Only 1P server (Xeon E3) version released | Kaby Lake-DT/H cores: 4 (4/8) | Kaby Lake-X[33] | Kaby Lake | Kaby Lake-H Kaby Lake-U Kaby Lake-Y | ||||
| Kaby Lake R[34][35] | 8 | — | KBL-R | 2017-08-21[35] | Only mobile version released | Kaby Lake R | |||||||||
| Coffee Lake | 8[36] | E-2100 | CFL CFL-S CFL-E CFL-H CFL-U | 2017-10-05[37] | Only 1P server (Xeon E) version released | Coffee Lake-H | Coffee Lake-S WS (Coffee Lake-E) | No WS version released | Coffee Lake-S | Coffee Lake-H Coffee Lake-U | |||||
| Whiskey Lake, Amber Lake[38] | 8 | — | WHL AML | 2018-08-28[38] | Only mobile version released | Whiskey Lake-U Amber Lake-Y | |||||||||
| Skylake (Skylake-X Refresh) | 9 | ? | 2018-10-08[39] | Only WS version released | Skylake X | Only WS version released | |||||||||
| Coffee Lake (Coffee Lake Refresh) | 9[36] | E-2200 | CFL-R CFL-ER CFL-HR | — | 2018-10-08,[40] 2019-04-23[41] | Only 1P server (Xeon E) version released | Coffee Lake-S WS (Coffee Lake-ER) | No WS version released | Coffee Lake-R | Coffee Lake-H Refresh | |||||
| Cascade Lake | 10 | 2(SP) W-2200 W-3200 | CSL | CXL | 2019-04-02[42] | Cascade Lake-SP | Cascade Lake-AP | — | Cascade Lake-W Cascade Lake-X | Only server / WS version released | |||||
| Comet Lake,[43] Amber Lake | 10 | — | CML AML | — | 2019-08-21[43] | No server version released | Comet Lake-W | Comet Lake-S | Comet Lake-H Comet Lake-U Amber Lake-Y | ||||||
| Cascade Lake (Cascade Lake Refresh) | — | 2(SP) | — | ? | 2020-02-24[44] | Cascade Lake R | Only server version released | ||||||||
| Cooper Lake | — | 3(SP) | — | CPL CPL-SP | 2020-06-18[45] | Cooper Lake-SP | Only 8P/4P server version released | ||||||||
| Architecture | Cypress Cove[46] | Rocket Lake[46] | 11 | E-2300 | RKL | — | 2021-03-30[47] | — | Rocket Lake-E | Rocket Lake-W | Rocket Lake-S | — | |||
| Process | 10 nm | Palm Cove | Cannon Lake | 8 | — | CNL | 2018-05-16[48] | Only mobile version released | Cannon Lake-U | ||||||
| Architecture | Sunny Cove | Ice Lake[49] | 10 | 3(SP) | ICL | ICX[50] ICL-SP[50] | 2019-08-01[51] | — | Ice Lake-SP (2021-04-06)[50] | Ice Lake-D (April 2021) | — | Ice Lake-U Ice Lake-Y | |||
| Optimization[30] | Willow Cove | Tiger Lake[30] | 11 | — | TGL | — | 2020-09-02[52] | Only mobile version released | Tiger Lake-H35 Tiger Lake-UP3 Tiger Lake-UP4 | ||||||
| Architecture | Intel 7 | Golden Cove | Alder Lake | 12 | ADL | 2021-11-04 | No server / WS version released | Alder Lake-S | Alder Lake-HX Alder Lake-H Alder Lake-P Alder Lake-U | ||||||
| Sapphire Rapids[53] | — | 4(SP) W-2400 W-3400 | — | SPR | 2023-01-10 | Sapphire Rapids-SP | Sapphire Rapids-HBM Sapphire Rapids-SP | — | Sapphire Rapids-WS | Only server / WS version released | |||||
| Optimization | Raptor Cove | Raptor Lake | 13 | — | RPL | — | 2022-10-20 | No server / WS version released | Raptor Lake-S | Raptor Lake-HX Raptor Lake-H Raptor Lake-P Raptor Lake-U | |||||
| Raptor Lake[54] (Raptor Lake Refresh) | 14 | E-2400 | RPL-R | 2023-10-17 | Only 1P server (Xeon E) version released | Raptor Lake-E | — | Raptor Lake-S Refresh | — | ||||||
| — | 2024-01-08 | Mobile processors refreshed | Raptor Lake-HX Refresh | ||||||||||||
| Core Series 1 | Raptor Lake-U Refresh | ||||||||||||||
| Emerald Rapids | — | Xeon 5 (SP) | — | EMR | 2023-12-14 | Emerald Rapids-SP | Only server version released | ||||||||
| Tick | Intel 4[55] | Redwood Cove | Meteor Lake[56] | Core Ultra (Series 1) | — | MTL | — | 2023-12-14 | Only mobile version released | Meteor Lake-S Meteor Lake-PS | Meteor Lake-H Meteor Lake-U | ||||
| Tick | Intel 3 | Granite Rapids[57] | — | Xeon 6(SP) | — | GNR | 2024-09-24[58] | — | Granite Rapids-AP | — | Only server / WS version released | ||||
| 2025 Q1[58][59] | Granite Rapids-SP | ||||||||||||||
| 2025[60] | — | Granite Rapids-D | |||||||||||||
| Tick | Intel 20A | Lion Cove | Arrow Lake[61] | 15(informally) Core Ultra 200S Core Ultra (Series 2) | — | ARL | — | 2024-10-03 | No server / WS version released | Arrow Lake-S Arrow Lake-SK | — | ||||
| Core Ultra 200H Core Ultra 200HX Intel Core Ultra H & HX Series[62] | 2025 Q1[62] | Arrow Lake-R Arrow Lake-K Arrow Lake-KF | Arrow Lake-HX Arrow Lake-H | ||||||||||||
| Tick | Intel 18A | Lunar Lake | Core Ultra 200V Core Ultra (Series 2) | — | LNL | — | 2024-09-03 | Only mobile version released | Lunar Lake-V Lunar Lake-MX | ||||||
| Change (step) | Fabrication process | Micro- architecture | Code names for step | Intel Generation Desktop | Intel Generation Xeon | Intel Microcode shortcut(s) Desktop/WS[6][7] | Intel Microcode shortcut(s) Xeon/Server | Release date | 8P/4P Server | 4P/2P Server/WS | Embedded Xeon | 1P Xeon | Enthusiast/WS | Desktop | Mobile |
| Processors | |||||||||||||||
WithSilvermont Intel tried to start Tick-Tock in Atom architecture but problems with the10 nm process prevented it.
In the table below instead of Tick-Tock steps Process-Architecture-Optimization are used. There is no official confirmation that Intel uses Process-Architecture-Optimization for Atom, but it enables us to understand what changes happened in each generation.
| Change | Fabrication process | Micro- architecture (Abbr.)[12] | Code names for step | Release date | Processors/SoCs | ||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| MID, Smartphone | Tablet | Netbook | Nettop | Embedded | Server | CE | |||||
| Process / Architecture | 45 nm | Bonnell (BNL) | Bonnell | 2008 | Silverthorne | — | Diamondville | — | — | — | |
| Optimization | Bonnell | 2010 | Lincroft | Pineview | Tunnel Creek Stellarton | — | Sodaville Groveland | ||||
| Process | 32 nm | Saltwell | 2011 | Medfield (Penwell & Lexington) & Clover Trail+ (Cloverview) | Clover Trail (Cloverview) | Cedar Trail (Cedarview) | — | Centerton & Briarwood | Berryville | ||
| Process / Architecture | 22 nm | Silvermont (SLM) | Silvermont | 2013 | Merrifield (Tangier)[64] & Moorefield (Anniedale)[65] & Slayton | Bay Trail-T (Valleyview) | Bay Trail-M (Valleyview) | Bay Trail-D (Valleyview) | Bay Trail-I (Valleyview) | Avoton Rangeley | Unknown |
| Process | 14 nm[63] | Airmont | 2014 | Binghamton & Riverton | Cherry Trail-T (Cherryview)[66] | Braswell[67] | Denverton Cancelled | Unknown | |||
| Architecture | Goldmont[68] (GLM) | Goldmont | 2016 | BroxtonCancelled | BroxtonCancelled Apollo Lake | Apollo Lake | Apollo Lake | Unknown | Denverton | Unknown | |
| Architecture | Goldmont Plus (GLM+, GLP) | Goldmont Plus | 2017 | Unknown | Gemini Lake | Gemini Lake | Gemini Lake | Unknown | Unknown | Unknown | |
| Optimization | Goldmont Plus | 2019 | Unknown | Gemini Lake Refresh | Gemini Lake Refresh | Gemini Lake Refresh | Unknown | Unknown | Unknown | ||
| Process / Architecture | 10 nm | Tremont | Tremont | 2020 | Unknown | Jasper Lake | Jasper Lake | Jasper Lake | Elkhart Lake | Snow Ridge | Unknown |
| Architecture | Intel 7 | Gracemont | Gracemont | 2021 | Unknown | Unknown | Alder Lake &Raptor Lake (hybrid) | Unknown | Unknown | ||
| Process / Architecture | Intel 4 | Crestmont | Crestmont | 2023 | Unknown | Unknown | Meteor Lake[69] (hybrid) | Sierra Forest-SP Sierra Forest-AP | Unknown | ||
Note: There is further theXeon Phi. It has up to now undergone four development steps with a current top model that got the code nameKnights Landing (shortcut: KNL;[12] the predecessor code names all had the leading termKnights in their name) that is derived from the Silvermont architecture as used for the Intel Atom series but realized in a shrunk 14 nm (FinFET) technology.[70] In 2018, Intel announced that Knights Landing and all further Xeon Phi CPU models were discontinued.[71] However, Intel'sSierra Forest and subsequent Atom-based Xeon CPUs are likely a spiritual successor to Xeon Phi.
A yearly product cadence moves the industry forward in a predictable fashion that can be planned in advance.
The Kaby Lake platform will be similar to Skylake platform that launches this year and will act as a platform refresher
We have long known that Intel was planning a 'Skylake Refresh' that has always been on the roadmap between Skylake and Cannonlake, but it appears that refresh might be going by the code name Kaby lake now.
the switch to 10nm manufacturing has been delayed until the second half of 2017.
Today marks the official launch date of the desktop S-series 7th Generation Core processors...
Intel Core i5-8250U, i5-8350U, i7-8550U, and i7-8650U Kaby Lake-R launches today (Source: Intel)
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Intel announced the on-time launch of its high-performance [Xeon 6] 'Granite Rapids' 6900P-series models today, with five new models spanning from 72 cores up to 128 cores, ... Intel will launch the more general-purpose P-core Xeon 6 models with 86 or fewer cores in the first quarter of 2025 (more info below). ... Intel's Xeon 6700P [sic?] series launches today worldwide, and the follow-on models come in Q1 2025. ...
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Intel confirmed at their MWC 2024 briefings that Granite Rapids D will debut in 2025 as the successor to Ice Lake D for Xeon D edge processors. ...