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I've noticed that userUser:JBMagination has changed all references to "ARM" in this article to sentence-case "Arm", citing company trademark policy. Doesn't this violateMOS:TM, as most sources still use Arm capitalized as "ARM"?ViperSnake151 Talk 21:45, 22 June 2020 (UTC)[reply]
For trademarks that are given in mixed or non-capitalization by their owners (such asadidas), follow the formatting and capitalization used byindependent reliable sources.
You'll note that even Arm themselves use "Arm" for the company and "ARM" for the architecture and the chipsNot uniformly. Seehttps://developer.arm.com/documentation/102404/latest/,https://developer.arm.com/documentation/ddi0487/latest/, andhttps://developer.arm.com/documentation/dui0801/l/Overview-of-the-Armv8-Architecture/About-the-Arm-architecture, all of which use "Arm" for the architecture, and the third of which also refers to "Arm processors".https://developer.arm.com/documentation/ddi0406/c uses "ARM" for the architectureand the company, but that's probably because it's "Copyright 1996-1998, 2000, 2004-2011 ARM Limited", and bothwere all-caps in the time frame in the copyright notice.https://developer.arm.com/documentation/ddi0360/e also uses "ARM", but that's both because it's older and because Arm didn't retroactively rename the ARM11 chip to "Arm11", as far as I know.Guy Harris (talk)17:47, 10 August 2025 (UTC)[reply]
Apart from anything else discussed just above, I would suggest altering the phrase "usually written as such today' to "often still written as such"NotesTracker (talk)12:15, 20 September 2020 (UTC)[reply]
I've not yet read all thesecurity paper saying: "The AMD Secure Processor, the gatekeeper responsible for the security of AMD processors, contains critical vulnerabilities." Note theAMD Platform Security Processor (I assume the same thing), built into their x86 CPUs, is ARM with TrustZone.
It's not clear that the ARM core and/or TrustZone (never looked to closely at it) is to blame and most reporting doesn't mention ARM but ratherthe non-open source code it runs. It seems it is to blame, possibly not the core running it. Be aware of that before blaming ARM here on this page; this is just FYI, and for discussion here.
Other links maybe helpful (first one where I discovered this before looking up the others):
https://www.wired.com/story/amd-backdoor-cts-labs-backlash/
https://hothardware.com/news/amd-processors-and-chipsets-ryzenfall-chimera-fallout-security-flaws
https://www.amd.com/en/technologies/securitycomp.arch (talk)
ARM instruction set redirects here. Wouldn't it be better to list the instructions there? This page doesn't list the instructions, and I am looking for them, so I would greatly appreciate it.Joao003 (talk)17:18, 17 October 2023 (UTC)[reply]
Is this true? Per the ARM2 data sheet (emphasis added): "A word load (LDR) should generate a word aligned address.An address offset from a word boundary will cause the data to be rotated into the register so that the addressed byte occupies bits 0 to 7. External hardware could perform a double access to memory to allow non-aligned word loads"
To me that doesn't sounds like "no support" as this article currently claims; it clearly farms the stuff of doing two 32-bit accesses and combining parts of each to external hardware but appears to offer a helping hand should the system be set up to do that — the external bus merely needs to gate each of the four bytes to ensure it presents each from the correct access, it doesn't need to rotate them into place.
I'd call this negligible support, but not "no support".96.234.17.8 (talk)18:19, 28 March 2024 (UTC)[reply]
I found that "ARM" has changed its name to "Arm", and now the documentation almost uses "Arm"
For example document:https://developer.arm.com/documentation/ddi0487/ka#:~:text=Arm%20Architecture%20Reference%20Manual%20for%20A-profile%20architecture.%20For%20a%20listShiinaKaze (talk)12:25, 25 September 2024 (UTC)[reply]
Research the following and if you find any details about the following, please include them with their sources:
1) ARMv9.6-M
2) ARMv9.6-R78.190.164.190 (talk)15:44, 4 December 2024 (UTC)[reply]
slight annoyance and issue doing categorisation of extensions: the page is enormous, and in x86 and MIPS every extension is in its own page even if a stub. exceptions include sub-extensions of say AVX512 which got a bit rowdy. but even 2-instruction extensions have their own page. it's just cleanerLkcl (talk)12:20, 10 August 2025 (UTC)[reply]
The redirectNormal world has been listed atredirects for discussion to determine whether its use and function meets theredirect guidelines. Readers of this page are welcome to comment on this redirect atWikipedia:Redirects for discussion/Log/2025 October 5 § Normal world until a consensus is reached.Utopes(talk /cont)09:11, 5 October 2025 (UTC)[reply]