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Inintegrated circuit design,static core generally refers to amicroprocessor (MPU) entirely implemented instatic logic.[1] A static core MPU may be halted by stopping thesystem clock oscillator that is driving it, maintaining its state and resume processing at the point where it was stopped when the clock signal is restarted, as long as power continues to be applied. Static core MPUs are fabricated in theCMOS process and hence consume very little power when the clock is stopped, making them useful in designs in which the MPU remains in standby mode until needed and minimal loading of the power source (often abattery) is desirable during standby.[2]
In comparison, dynamic core microprocessor designs, those without a static core, only refresh and present valid outputs on their pins during specific periods of the clock cycle. If the clock is slowed, or stopped, the charge on the pinleaks out of thecapacitors over time, quickly moving to the default state and no longer being valid. Dynamic designs have to run within a set range of clock frequencies to avoid this problem.
Static core microprocessors include theRCA 1802,Intel 80386EX,WDCW65C02S, WDCW65C816S andFreescale 683XX family.
Manylow-power electronics systems are designed asfully static systems—such as, for example, thePsion Organiser,[3] theTRS-80 Model 100, and theGalileo spacecraft. In such a fully static system, the processor has a static core and data is stored instatic RAM, rather thandynamic RAM. Such design features allow the entire system to be "paused" indefinitely in a low power state, and then instantly resumed when needed.[3]
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