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Process–architecture–optimization model

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CPU development model by Intel

Process–architecture–optimization is a development model forcentral processing units (CPUs) thatIntel adopted in 2016. Under this three-phase (three-year) model, everymicroprocessordie shrink is followed by amicroarchitecture change and then by one or more optimizations. It replaced the two-phase (two-year)tick–tock model that Intel adopted in 2006. The tick–tock model was no longer economically sustainable, according to Intel, because production of ever smaller dies becomes ever more costly.[1][2][3][4][5]

Roadmap

[edit]
Wave[6]Process
(die shrink)
ArchitectureOptimizationsOptional
backport[7][8]
1:
14 nm
2014:
Broadwell
(5th gen)
2015:
Skylake
(6th gen)
2016:
Kaby Lake
(7th gen)
2017:
Coffee Lake
(8th gen)
2018:
Coffee Lake Refresh
(9th gen)
2019:
Comet Lake
(10th gen)
N/A2021:
Rocket Lake
(11th gen,Cypress Cove)
References:[1][3][6][9]
2:
10 nm
(Intel 7)
2018:[note 1]
Cannon Lake
(8th gen,Palm Cove)
2019:
Ice Lake
(10th gen,Sunny Cove)
2020:
Tiger Lake
(11th gen,Willow Cove)
2021:
Alder Lake
(12th gen,Golden Cove)
2022:
Raptor Lake
(13th gen)
2023:
Raptor Lake Refresh
(14th gen)
2025:
Raptor Lake Refresh
(Core 200)
N/A
References:[1][10][9][11][12]
3:
Intel 4
&
Intel 3
2023:
Meteor Lake
(14th gen)
2025:
Arrow Lake-U
(Ultra 200U)
References:[13]
3:
Intel 20A?
&
Intel 18A
2025:
Panther Lake
(Ultra 300)
2026?:
Nova Lake
(Ultra 400?)
References:

See also

[edit]

Notes

[edit]
  1. ^Cannon Lake: only 1 CPU released, microarchitecture dumped 1.5 year later.

References

[edit]
  1. ^abcTick Tock On The Rocks: Intel Delays 10nm, Adds 3rd Gen 14nm Core Product "Kaby Lake". AnandTech. 16 July 2015.
  2. ^Cutress, Ian."Intel's 'Tick-Tock' Seemingly Dead, Becomes 'Process-Architecture-Optimization'". Archived fromthe original on March 23, 2016.
  3. ^abeTeknix.com (23 March 2016)."Intel Ditches 'Tick-Tock' for 'Process-Architecture-Optimization' - eTeknix".
  4. ^"Intel Tick-Tock Processor Model Replaced With Process-Architecture-Optimization - Legit Reviews". 23 March 2016.
  5. ^"Intel 7th Gen Core: Process Architecture Optimization". 30 August 2016.
  6. ^abIntel Launches 7th Generation Kaby Lake: 15W/28W with Iris, 35-91W Desktop and Mobile Xeon - 03 January 2017.
  7. ^Cutress, Dr Ian."Intel's Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm".www.anandtech.com. Archived fromthe original on December 11, 2019. Retrieved2021-03-15.
  8. ^December 2019, Arne Verheyde 11 (11 December 2019)."Intel Process Roadmap Shows 1.4nm in 2029, Two-Year Cadence (Updated)".Tom's Hardware. Retrieved2021-03-15.{{cite web}}: CS1 maint: numeric names: authors list (link)
  9. ^abIntel’s Path to 10nm: 2010 to 2019 - 25 January 2019
  10. ^Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review - 25 January 2019.
  11. ^Intel Raptor Lake's rumoured 24 cores could crush multi-threaded applications - 11 June 2021.
  12. ^Cutress, Ian (26 July 2021)."Intel's Process Roadmap to 2025: with 4nm, 3nm, 20A and 18A".www.anandtech.com. Archived fromthe original on July 26, 2021.
  13. ^Meteor Lake, Intel's first 7nm CPU, to tape in before July this year and release in 2023 - 23 March 2021.
Subsidiaries
Joint venture
4Group Holdings (50% owned byVantiva)
Products
Lists
Microarchitectures
IA-32 (32-bit x86)
x86-64 (64-bit)
x86ULV
Current products
x86-64 (64-bit)
Discontinued
BCD oriented (4-bit)
pre-x86 (8-bit)
Earlyx86 (16-bit)
x87 (externalFPUs)
8/16-bit databus
8087 (1980)
16-bit databus
80C187
80287
80387SX
32-bit databus
80387DX
80487
IA-32 (32-bit x86)
x86-64 (64-bit)
Other
Related
Litigation
People
Founders
CEOs
Related
Intel CPU core roadmaps fromP6 to Panther Lake
Atom (ULV)Node namePentium/Core
Microarch.StepMicroarch.Step
600 nmP6Pentium Pro
(133 MHz)
500 nmPentium Pro
(150 MHz)
350 nmPentium Pro
(166–200 MHz)
Klamath
250 nmDeschutes
KatmaiNetBurst
180 nmCoppermineWillamette
130 nmTualatinNorthwood
Pentium MBaniasNetBurst(HT)NetBurst(×2)
90 nmDothanPrescottPrescott‑2MSmithfield
TejasCedarmill (Tejas)
65 nmYonahNehalem (NetBurst)Cedar MillPresler
CoreMerom4 cores on mainstream desktop,DDR3 introduced
BonnellBonnell45 nmPenryn
NehalemNehalemHT reintroduced, integratedMC, PCH
L3-cache introduced, 256 KB L2-cache/core
Saltwell32 nmWestmereIntroduced GPU on same package andAES-NI
Sandy BridgeSandy BridgeOn-die ring bus, no more non-UEFI motherboards
SilvermontSilvermont22 nmIvy Bridge
HaswellHaswellFully integrated voltage regulator
Airmont14 nmBroadwell
SkylakeSkylakeDDR4 introduced on mainstream desktop
GoldmontGoldmontKaby Lake
Coffee Lake6 cores on mainstream desktop
Amber LakeMobile-only
Goldmont PlusGoldmont PlusWhiskey LakeMobile-only
Coffee Lake Refresh8 cores on mainstream desktop
Comet Lake10 cores on mainstream desktop
Sunny CoveCypress Cove (Rocket Lake)Backported Sunny Cove microarchitecture for 14 nm
TremontTremont10 nmSkylakePalm Cove (Cannon Lake)Mobile-only
Sunny CoveSunny Cove (Ice Lake)512 KB L2-cache/core
Willow Cove (Tiger Lake)Xe graphics engine
GracemontGracemontIntel 7
(10 nm ESF)
Golden CoveGolden Cove (Alder Lake)Hybrid, DDR5, PCIe 5.0
Raptor Cove (Raptor Lake)
CrestmontCrestmontIntel 4Redwood CoveMeteor LakeMobile-only
NPU,chiplet architecture
Intel 3Arrow Lake-U
SkymontSkymontN3B (TSMC)Lion CoveLunar LakeLow power mobile only (9–30 W)
Arrow Lake
DarkmontDarkmontIntel 18ACougar CovePanther Lake
  • Strike-through indicates cancelled processors
  • Bold names are microarchitectures
  • Italic names are future processors


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