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ANOR gate or a NOT OR gate is a logic gate which gives a positive output only when both inputs are negative.

LikeNAND gates, NOR gates are so-called "universal gates" that can be combined to form any other kind oflogic gate. For example, the firstembedded system, theApollo Guidance Computer, was built exclusively from NOR gates, about 5,600 in total for the later versions. Today,integrated circuits are not constructed exclusively from a single type of gate. Instead,EDA tools are used to convert the description of a logical circuit to anetlist of complex gates (standard cells) or transistors (full custom approach).

A NOR gate is logically an inverted OR gate. It has the following truth table:

Q =A NORB Truth Table Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 0

A NOR gate is a universal gate, meaning that any other gate can be represented as a combination of NOR gates.

This is made by joining the inputs of a NOR gate. As a NOR gate is equivalent to an OR gate leading to NOT gate, joining the inputs makes the output of the "OR" part of the NOR gate the same as the input, eliminating it from consideration and leaving only the NOT part.

Desired NOT Gate	NOR Construction
Q = NOT(A )	=A NORA
Truth Table Input A Output Q 0 1 1 0

An OR gate is made by inverting the output of a NOR gate. Note that we already know that a NOT gate is equivalent to a NOR gate with its inputs joined.

Desired OR Gate	NOR Construction
Q =A ORB	= (A NORB ) NOR (A NORB )
Truth Table Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 1

An AND gate gives a 1 output when both inputs are 1. Therefore, an AND gate is made by inverting the inputs of a NOR gate. Again, note that a NOR gate is equivalent to a NOT with its inputs joined.

Desired AND Gate	NOR Construction
Q =A ANDB	= (A NORA ) NOR (B NORB )
Truth Table Input A Input B Output Q 0 0 0 0 1 0 1 0 0 1 1 1

A NAND gate is made by inverting the output of an AND gate. The word NAND means that it is not AND. As the name suggests, it will give 0 when both the inputs are 1.

Desired NAND Gate	NOR Construction
Q =A NANDB	= [ (A NORA ) NOR (B NORB ) ] NOR [ (A NORA ) NOR (B NORB ) ]
Truth Table Input A Input B Output Q 0 0 1 0 1 1 1 0 1 1 1 0

An XNOR gate is made by connecting four NOR gates as shown below. This construction entails a propagation delay three times that of a single NOR gate.

Desired XNOR Gate	NOR Construction
Q =A XNORB	= [A NOR (A NORB ) ] NOR [B NOR (A NORB ) ]
Truth Table Input A Input B Output Q 0 0 1 0 1 0 1 0 0 1 1 1

Alternatively, an XNOR gate is made by considering theconjunctive normal form${\displaystyle (A+\overline{B})\cdot (\overline{A}+B)}$, noting fromde Morgan's Law that a NOR gate is an inverted-input AND gate. This construction uses five gates instead of four.

Desired Gate	NOR Construction
Q =A XNORB	= [B NOR (A NORA ) ] NOR [A NOR (B NORB ) ]

An XOR gate is made by considering theconjunctive normal form${\displaystyle (A+B)\cdot (\overline{A}+\overline{B})}$, noting fromde Morgan's Law that a NOR gate is an inverted-input OR gate. This construction entails a propagation delay three times that of a single NOR gate and uses five gates.

Desired XOR Gate	NOR Construction
Q =A XORB	= [ (A NORA ) NOR (B NORB ) ] NOR (A NORB )
Truth Table Input A Input B Output Q 0 0 0 0 1 1 1 0 1 1 1 0

Alternatively, the 4-gate version of the XNOR gate can be used with an inverter. This construction has a propagation delay four times (instead of three times) that of a single NOR gate.

Desired Gate	NOR Construction
Q =A XORB	= { [A NOR (A NORB ) ] NOR [B NOR (A NORB ) ] } NOR { [A NOR (A NORB ) ] NOR [B NOR (A NORB ) ] }

• NAND logic — Like NOR gates, NAND gates are also universal gates.
• Functional completeness

• Logic gates

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