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NMOS ornMOS logic (from N-type metal–oxide–semiconductor) usesn-type (-)MOSFETs (metal–oxide–semiconductorfield-effect transistors) to implementlogic gates and otherdigital circuits.[1][2]
NMOS transistors operate by creating aninversion layer in ap-type transistor body. This inversion layer, called the n-channel, can conductelectrons betweenn-typesource anddrain terminals. The n-channel is created by applying voltage to the third terminal, called thegate. Like other MOSFETs, nMOS transistors have four modes of operation: cut-off (or subthreshold), triode, saturation (sometimes called active), and velocity saturation.
NMOS AND-by-default logic can produce unusual glitches or buggy behavior in NMOS components, such as the6502 "illegal opcodes" which are absent in CMOS 6502s. In some cases such as Commodore'sVIC-II chip, the bugs present in the chip's logic were extensively exploited by programmers for graphics effects.
For many years, NMOS circuits were much faster than comparablePMOS andCMOS circuits, which had to use much slower p-channel transistors. It was also easier to manufacture NMOS than CMOS, as the latter has to implement p-channel transistors in special n-wells on the p-substrate, not prone to damage from bus conflicts, and not as vulnerable to electrostatic discharge damage. The major drawback with NMOS (and most otherlogic families) is that adirect current must flow through a logic gate even when the output is in asteady state (low in the case of NMOS). This means staticpower dissipation, i.e. power drain even when the circuit is not switching, leading to high power consumption.
Another disadvantage of NMOS circuits is their thermal output. Due to the need to keep constant current running through the circuit to hold the transistors' states, NMOS circuits can generate a considerable amount of heat in operation which can reduce the device's reliability. This was especially problematic with the early large gate process nodes in the 1970s. CMOS circuits, for contrast, generate almost no heat unless the transistor count approaches 1 million.
CMOS components were relatively uncommon in the 1970s-early 1980s and would typically be indicated with a "C" in the part number. Throughout the 1980s, both NMOS and CMOS parts were widely used with CMOS becoming more widespread as the decade went along. NMOS was preferred for components that performed active processing such as CPUs or graphics processors due to its higher speed and cheaper manufacturing cost as these were expensive compared to a passive component such as a memory chip, and some chips such as theMotorola 68030 were hybrids with both NMOS and CMOS sections. CMOS has been near-universal in integrated circuits since the 1990s.
Additionally, just like indiode–transistor logic,transistor–transistor logic,emitter-coupled logic etc., the asymmetric input logic levels make NMOS and PMOS circuits more susceptible to noise than CMOS. These disadvantages are whyCMOS logic has supplanted most of these types in most high-speed digital circuits such asmicroprocessors despite the fact that CMOS was originally very slow compared tologic gates built withbipolar transistors.
MOS stands formetal-oxide-semiconductor, reflecting the way MOS-transistors were originally constructed, predominantly before the 1970s, with gates of metal, typically aluminium. Since around 1970, however, most MOS circuits have usedself-aligned gates made ofpolycrystalline silicon, a technology first developed byFederico Faggin atFairchild Semiconductor. Thesesilicon gates are still used in most types of MOSFET basedintegrated circuits, although metal gates (Al orCu) started to reappear in the early 2000s for certain types of high speed circuits, such as high performance microprocessors.
The MOSFETs are n-typeenhancement mode transistors, arranged in a so-called "pull-down network" (PDN) between the logic gate output and negative supply voltage (typically the ground). Apull up (i.e. a "load" that can be thought of as a resistor, see below) is placed between the positive supply voltage and each logic gate output. Anylogic gate, including thelogical inverter, can then be implemented by designing a network of parallel and/or series circuits, such that if the desired output for a certain combination ofboolean input values iszero (orfalse), the PDN will be active, meaning that at least one transistor is allowing a current path between the negative supply and the output. This causes a voltage drop over the load, and thus a low voltage at the output, representing thezero.
As an example, here is aNOR gate implemented in schematic NMOS. If either input A or input B is high (logic 1, = True), the respective MOS transistor acts as a very low resistance between the output and the negative supply, forcing the output to be low (logic 0, = False). When both A and B are high, both transistors are conductive, creating an even lower resistance path to ground. The only case where the output is high is when both transistors are off, which occurs only when both A and B are low, thus satisfying the truth table of a NOR gate:
| A | B | A NOR B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
A MOSFET can be made to operate as a resistor, so the whole circuit can be made with n-channel MOSFETs only. NMOS circuits are slow to transition from low to high. When transitioning from high to low, the transistors provide low resistance, and the capacitive charge at the output drains away very quickly (similar to discharging a capacitor through a very low resistor). But the resistance between the output and the positive supply rail is much greater, so the low to high transition takes longer (similar to charging a capacitor through a high value resistor). Using a resistor of lower value will speed up the process but also increases static power dissipation. However, a better (and the most common) way to make the gates faster is to usedepletion-mode transistors instead ofenhancement-mode transistors as loads. This is calleddepletion-load NMOS logic.
TheMOSFET was invented by Egyptian engineerMohamed M. Atalla and Korean engineerDawon Kahng atBell Labs in 1959, and demonstrated in 1960.[3] Theyfabricated both PMOS and NMOS devices with a20 μm process. However, the NMOS devices were impractical, and only the PMOS type were practical devices.[4]
In 1965,Chih-Tang Sah, Otto Leistiko andAndrew Grove atFairchild Semiconductor fabricated several NMOS devices with channel lengths between8 μm and 65 μm.[5] Dale L. Critchlow andRobert H. Dennard atIBM also fabricated NMOS devices in the 1960s. The first IBM NMOS product was amemory chip with 1 kb data and 50–100nsaccess time, which entered large-scale manufacturing in the early 1970s. This led to MOSsemiconductor memory replacing earlierbipolar andferrite-core memory technologies in the 1970s.[6]
Theearliest microprocessors in the early 1970s were PMOS processors, which initially dominated the earlymicroprocessor industry.[7] In 1973,NEC'sμCOM-4 was an early NMOS microprocessor, fabricated by the NECLSI team, consisting of five researchers led by Sohichi Suzuki.[8][9] By the late 1970s, NMOS microprocessors had overtaken PMOS processors.[7]CMOS microprocessors were introduced in 1975.[7][10][11] However, CMOS processors did not become dominant until the 1980s.[7]
CMOS was initially slower than NMOS logic, thus NMOS was more widely used for computers in the 1970s.[12] TheIntel 5101 (1 kbSRAM) CMOS memory chip (1974) had anaccess time of 800 ns,[13][14] whereas the fastest NMOS chip at the time, the Intel 2147 (4 kb SRAM)HMOS memory chip (1976), had an access time of 55/70 ns.[12][14] In 1978, aHitachi research team led by Toshiaki Masuhara introduced the twin-well Hi-CMOS process, with its HM6147 (4 kb SRAM) memory chip, manufactured with a3 μm process.[12][15] The Hitachi HM6147 chip was able to match the performance (55/70 ns access) of the Intel 2147 HMOS chip, while the HM6147 also consumed significantly less power (15 mA) than the 2147 (110 mA). With comparable performance and much less power consumption, the twin-well CMOS process eventually overtook NMOS as the most commonsemiconductor manufacturing process for computers in the 1980s.[12][7]
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