The observation is named afterGordon Moore, the co-founder ofFairchild Semiconductor andIntel and former Chief Executive Officer of the latter, who in 1965 noted that the number of components per integrated circuit had beendoubling every year,[a] and projected this rate of growth would continue for at least another decade. In 1975, looking forward to the next decade, he revised the forecast to doubling every two years, acompound annual growth rate (CAGR) of 41%. Moore's empirical evidence did not directly imply that the historical trend would continue; nevertheless, his prediction has held since 1975 and has since become known as alaw.
Industry experts have not reached a consensus on exactly when Moore's law will cease to apply. Microprocessor architects report that semiconductor advancement has slowed industry-wide since around 2010, slightly below the pace predicted by Moore's law. In September 2022,Nvidia CEOJensen Huang considered Moore's law dead,[2] while Intel's then CEOPat Gelsinger had the opposite view.[3]
In 1959,Douglas Engelbart studied the projected downscaling of integrated circuit (IC) size, publishing his results in the article "Microelectronics, and the Art of Similitude".[4][5][6] Engelbart presented his findings at the 1960International Solid-State Circuits Conference, where Moore was present in the audience.[7]
In 1965, Gordon Moore, who at the time was working as the director of research and development atFairchild Semiconductor, was asked to contribute to the thirty-fifth-anniversary issue ofElectronics magazine with a prediction on the future of the semiconductor components industry over the next ten years.[8] His response was a brief article entitled "Cramming more components onto integrated circuits".[1][9][b] Within his editorial, he speculated that by 1975 it would be possible to contain as many as65000 components on a single quarter-square-inch (~ 1.6 cm2) semiconductor.
The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years.[1]
This graph demonstrates how Moore's law has largely held since about 1965 and how progress prior to 1965 was slower.
Moore posited a log–linear relationship between device complexity (higher circuit density at reduced cost) and time.[12][13] In a 2015 interview, Moore noted of the 1965 article: "... I just did a wild extrapolation saying it's going to continue to double every year for the next 10 years."[14] One historian of the law citesStigler's law of eponymy, to introduce the fact that the regular doubling of components was known to many working in the field.[13]
In 1974,Robert H. Dennard atIBM recognized the rapidMOSFET scaling technology and formulated what became known asDennard scaling, which describes that as MOS transistors get smaller, theirpower density stays constant such that the power use remains in proportion with area.[15][16] Evidence from the semiconductor industry shows that this inverse relationship between power density andareal density broke down in the mid-2000s.[17]
At the 1975IEEE International Electron Devices Meeting, Moore revised his forecast rate,[18][19] predicting semiconductor complexity would continue to double annually until about 1980, after which it would decrease to a rate of doubling approximately every two years.[19][20][21] He outlined several contributing factors for this exponential behavior:[12][13]
The exponential rate of increase in die sizes, coupled with a decrease in defective densities, with the result that semiconductor manufacturers could work with larger areas without losing reduction yields
Finer minimum dimensions
What Moore called "circuit and device cleverness"
Shortly after 1975,Caltech professorCarver Mead popularized the termMoore's law.[22][23] Moore's law eventually came to be widely accepted as a goal for the semiconductor industry, and it was cited by competitive semiconductor manufacturers as they strove to increase processing power. Moore viewed his eponymous law as surprising and optimistic: "Moore's law is a violation ofMurphy's law. Everything gets better and better."[24] The observation was even seen as aself-fulfilling prophecy.[25][26]
The doubling period is often misquoted as 18 months because of a separate prediction by Moore's colleague, Intel executiveDavid House.[27] In 1975, House noted that Moore's revised law of doubling transistor count every 2 years in turn implied that computer chip performance would roughly double every 18 months,[28] with no increase in power consumption.[29] Mathematically, Moore's law predicted that transistor count would double every 2 years due to shrinking transistor dimensions and other improvements.[30] As a consequence of shrinking dimensions, Dennard scaling predicted that power consumption per unit area would remain constant. Combining these effects, David House deduced that computer chip performance would roughly double every 18 months. Also due to Dennard scaling, this increased performance would not be accompanied by increased power, i.e., the energy-efficiency ofsilicon-based computer chips roughly doubles every 18 months. Dennard scaling ended in the 2000s.[17] Koomey later showed that a similar rate of efficiency improvement predated silicon chips and Moore's law, for technologies such as vacuum tubes.
A 1982Osborne Executive portable computer, with a 4 MHz 8-bitZilog Z80 CPU, and a 2007AppleiPhone with a 412 MHz 32-bitARM11 CPU; the Executive has 100 times the weight, almost 500 times the volume, approximately 10 times the inflation-adjusted cost, and 1/100th theclock frequency of thesmartphone.
Microprocessor architects report that since around 2010, semiconductor advancement has slowed industry-wide below the pace predicted by Moore's law.[17]Brian Krzanich, the former CEO of Intel, cited Moore's 1975 revision as a precedent for the current deceleration, which results from technical challenges and is "a natural part of the history of Moore's law".[31][32][33] The rate of improvement in physical dimensions known as Dennard scaling also ended in the mid-2000s. As a result, much of the semiconductor industry has shifted its focus to the needs of major computing applications rather than semiconductor scaling.[25][34][17] Nevertheless, as of 2019, leading semiconductor manufacturersTSMC andSamsung Electronics claimed to keep pace with Moore's law[35][36][37][38][39][40] with10,7, and5 nm nodes in mass production.[35][36][41][42][43]
As the cost of computer power to the consumer falls, the cost for producers to fulfill Moore's law follows an opposite trend: R&D, manufacturing, and test costs have increased steadily with each new generation of chips. The cost of the tools, principallyextreme ultraviolet lithography (EUVL), used to manufacture chips doubles every 4 years.[44] Rising manufacturing costs are an important consideration for the sustaining of Moore's law.[45] This led to the formulation ofMoore's second law, also called Rock's law (named afterArthur Rock), which is that thecapital cost of asemiconductor fabrication plant also increases exponentially over time.[46][47]
Numerous innovations by scientists and engineers have sustained Moore's law since the beginning of the IC era. Some of the key innovations are listed below, as examples of breakthroughs that have advanced integrated circuit andsemiconductor device fabrication technology, allowing transistor counts to grow by more than seven orders of magnitude in less than five decades.
Deep UV excimer laserphotolithography: Invented by Kanti Jain[60] at IBMcirca 1980.[61][62][63] Prior to this,excimer lasers had been mainly used as research devices since their development in the 1970s.[64][65] From a broader scientific perspective, the invention of excimer laser lithography has been highlighted as one of the major milestones in the 50-year history of the laser.[66][67]
Interconnect innovations: Interconnect innovations of the late 1990s, including chemical-mechanical polishing orchemical mechanical planarization (CMP), trench isolation, and copper interconnects—although not directly a factor in creating smaller transistors—have enabled improvedwafer yield, additionallayers of metal wires, closer spacing of devices, and lower electrical resistance.[68][69][70]
Computer industry technology road maps predicted in 2001 that Moore's law would continue for several generations of semiconductor chips.[71]
A simulation of electron density as gate voltage (Vg) varies in ananowire MOSFET. The threshold voltage is around 0.45 V. Nanowire MOSFETs lie toward the end of the ITRS road map for scaling devices below 10 nm gate lengths.
One of the key technical challenges of engineering futurenanoscale transistors is the design of gates. As device dimensions shrink, controlling the current flow in the thin channel becomes more difficult. Modern nanoscale transistors typically take the form ofmulti-gate MOSFETs, with theFinFET being the most common nanoscale transistor. The FinFET has gate dielectric on three sides of the channel. In comparison, thegate-all-around MOSFET (GAAFET) structure has even better gate control.
Agate-all-around MOSFET (GAAFET) was first demonstrated in 1988, by aToshiba research team led byFujio Masuoka, who demonstrated a vertical nanowire GAAFET that he called a surrounding gate transistor (SGT).[72][73] Masuoka, best known as the inventor offlash memory, later left Toshiba and founded Unisantis Electronics in 2004 to research surrounding-gate technology along withTohoku University.[74]
In 2010, researchers at theTyndall National Institute in Cork, Ireland announced a junctionless transistor. A control gate wrapped around a silicon nanowire can control the passage of electrons without the use of junctions or doping. They claim these may be produced at 10 nm scale using existing fabrication techniques.[77]
In 2011, researchers at the University of Pittsburgh announced the development of a single-electron transistor, 1.5 nm in diameter, made out of oxide-based materials. Three wires converge on a central island that can house one or two electrons. Electrons tunnel from one wire to another through the island. Conditions on the third wire result in distinct conductive properties including the ability of the transistor to act as a solid-state memory.[78] Nanowire transistors could spur the creation of microscopic computers.[79][80][81]
In 2012, a research team at theUniversity of New South Wales announced the development of the first working transistor consisting of a single atom placed precisely in a silicon crystal (not just picked from a large sample of random transistors).[82] Moore's law predicted this milestone to be reached for ICs in the lab by 2020.
In 2015, IBM demonstrated7 nm node chips withsilicon–germanium transistors produced using EUVL. The company believed this transistor density would be four times that of the then-current14 nm chips.[83]
Samsung and TSMC plan to manufacture 3nm GAAFET nodes by 2021–2022.[84][85] Note that node names, such as 3nm, have no relation to the physical size of device elements (transistors).
AToshiba research team including T. Imoto, M. Matsui and C. Takubo developed asystem block module wafer bonding process for manufacturingthree-dimensional integrated circuit (3D IC) packages in 2001.[86][87] In April 2007, Toshiba introduced an eight-layer 3D IC, the 16GB THGAMembeddedNAND flash memory chip that was manufactured with eight stacked 2GB NAND flash chips.[88] In September 2007,Hynix introduced 24-layer 3D IC, a 16GB flash memory chip that was manufactured with 24 stacked NAND flash chips using a wafer bonding process.[89]
V-NAND, also known as 3D NAND, allows flash memory cells to be stacked vertically usingcharge trap flash technology originally presented by John Szedon in 1967, significantly increasing the number of transistors on a flash memory chip. 3D NAND was first announced by Toshiba in 2007.[90] V-NAND was first commercially manufactured bySamsung Electronics in 2013.[91][92][93]
In 2008, researchers at HP Labs announced a workingmemristor, a fourth basic passive circuit element whose existence only had been theorized previously. The memristor's unique properties permit the creation of smaller and better-performing electronic devices.[94]
In 2014, bioengineers atStanford University developed a circuit modeled on the human brain.Sixteen Neurocore chips simulate one million neurons and billions of synaptic connections, claimed to be9000 times faster as well as more energy efficient than a typical PC.[95]
In 2015, Intel andMicron announced3D XPoint, anon-volatile memory claimed to be significantly faster with similar density compared to NAND. Production scheduled to begin in 2016 was delayed until the second half of 2017.[96][97][98]
In 2017, Samsung combined its V-NAND technology witheUFS 3D IC stacking to produce a 512GB flash memory chip, with eight stacked 64-layer V-NAND dies.[99] In 2019, Samsung produced a 1TB flash chip with eight stacked 96-layer V-NAND dies, along withquad-level cell (QLC) technology (4-bit per transistor),[100][101] equivalent to 2trillion transistors, the highest transistor count of any IC chip.
In 2020, Samsung Electronics planned to produce the5 nm node, using FinFET andEUV technology.[36][needs update]
In May 2021, IBM announced the creation of the first2 nm computer chip, with parts supposedly being smaller than human DNA.[102]
Microprocessor architects report that semiconductor advancement has slowed industry-wide since around 2010, below the pace predicted by Moore's law.[17] Brian Krzanich, the former CEO of Intel, announced, "Our cadence today is closer to two and a half years than two."[103] Intel stated in 2015 that improvements in MOSFET devices have slowed, starting at the22 nm feature width around 2012, and continuing at14 nm.[104] Pat Gelsinger, former Intel CEO, stated at the end of 2023 that "we're no longer in the golden era of Moore's Law, it's much, much harder now, so we're probably doubling effectively closer to every three years now, so we've definitely seen a slowing."[105]
The physical limits to transistor scaling have been reached due to source-to-drain leakage, limited gate metals and limited options for channel material. Other approaches are being investigated, which do not rely on physical scaling. These include the spin state of electronspintronics,tunnel junctions, and advanced confinement of channel materials via nano-wire geometry.[106] Spin-based logic and memory options are being developed actively in labs.[107][108]
The vast majority of current transistors on integrated circuits are composed principally ofdoped silicon and its alloys. As silicon is fabricated into single nanometer transistors,short-channel effects adversely changes desired material properties of silicon as a functional transistor. Below are several non-silicon substitutes in the fabrication of small nanometer transistors.
One proposed material isindium gallium arsenide, or InGaAs. Compared to their silicon and germanium counterparts, InGaAs transistors are more promising for future high-speed, low-power logic applications. Because of intrinsic characteristics ofIII–V compound semiconductors, quantum well andtunnel effect transistors based on InGaAs have been proposed as alternatives to more traditional MOSFET designs.
In 2009, Intel announced the development of 80 nm InGaAsquantum well transistors. Quantum well devices contain a material sandwiched between two layers of material with a wider band gap. Despite being double the size of leading pure silicon transistors at the time, the company reported that they performed equally as well while consuming less power.[109]
In 2011, researchers at Intel demonstrated 3-Dtri-gate InGaAs transistors with improved leakage characteristics compared to traditional planar designs. The company claims that their design achieved the best electrostatics of any III–V compound semiconductor transistor.[110] At the 2015International Solid-State Circuits Conference, Intel mentioned the use of III–V compounds based on such an architecture for their 7 nm node.[111][112]
In 2012, a team in MIT's Microsystems Technology Laboratories developed a 22 nm transistor based on InGaAs that, at the time, was the smallest non-silicon transistor ever built. The team used techniques used in silicon device fabrication and aimed for better electrical performance and a reduction to10-nanometer scale.[115]
Biological computing research shows that biological material has superior information density and energy efficiency compared to silicon-based computing.[116]
Various forms ofgraphene are being studied forgraphene electronics, e.g.,graphene nanoribbontransistors have shown promise since their appearance in publications in 2008. (Bulk graphene has aband gap of zero and thus cannot be used in transistors because of its constant conductivity, an inability to turn off. The zigzag edges of the nanoribbons introduce localized energy states in the conduction and valence bands and thus a bandgap that enables switching when fabricated as a transistor. As an example, a typical GNR of width of 10 nm has a desirable bandgap energy of 0.4 eV.[117][118]) More research will need to be performed, however, on sub-50 nm graphene layers, as its resistivity value increases and thus electron mobility decreases.[117]
In April 2005,Gordon Moore stated in an interview that the projection cannot be sustained indefinitely: "It can't continue forever. The nature of exponentials is that you push them out and eventually disaster happens." He also noted that transistors eventually would reach the limits of miniaturization atatomic levels:
In terms of size [of transistors] you can see that we're approaching the size of atoms which is a fundamental barrier, but it'll be two or three generations before we get that far—but that's as far out as we've ever been able to see. We have another 10 to 20 years before we reach a fundamental limit. By then they'll be able to make bigger chips and have transistor budgets in the billions.[119]
— Gordon Moore in 2006
In 2016 theInternational Technology Roadmap for Semiconductors, after using Moore's Law to drive the industry since 1998, produced its final roadmap. It no longer centered its research and development plan on Moore's law. Instead, it outlined what might be called the More than Moore strategy in which the needs of applications drive chip development, rather than a focus on semiconductor scaling. Application drivers range from smartphones to AI to data centers.[120]
Some forecasters, including Gordon Moore,[122] predict that Moore's law will end by around 2025.[123][120][124] Although Moore's Law will reach a physical limit, some forecasters are optimistic about the continuation of technological progress in a variety of other areas, including new chip architectures, quantum computing, and AI and machine learning.[125][126]Nvidia CEOJensen Huang declared Moore's law dead in 2022;[2] several days later, Intel CEO Pat Gelsinger countered with the opposite claim.[3]
Digital electronics have contributed to world economic growth in the late twentieth and early twenty-first centuries.[127] The primary driving force of economic growth is the growth ofproductivity,[128] which Moore's law factors into. Moore (1995) expected that "the rate of technological progress is going to be controlled from financial realities".[129] The reverse could and did occur around the late-1990s, however, with economists reporting that "Productivity growth is the key economic indicator of innovation."[130] Moore's law describes a driving force of technological and social change, productivity, and economic growth.[131][132][128]
An acceleration in the rate of semiconductor progress contributed to a surge in U.S. productivity growth,[133][134][135] which reached 3.4% per year in 1997–2004, outpacing the 1.6% per year during both 1972–1996 and 2005–2013.[136] As economist Richard G. Anderson notes, "Numerous studies have traced the cause of the productivity acceleration to technological innovations in the production of semiconductors that sharply reduced the prices of such components and of the products that contain them (as well as expanding the capabilities of such products)."[137]
The primary negative implication of Moore's law is thatobsolescence pushes society up against theLimits to Growth. As technologies continue to rapidly improve, they render predecessor technologies obsolete. In situations in which security and survivability of hardware or data are paramount, or in which resources are limited, rapid obsolescence often poses obstacles to smooth or continued operations.[138]
Several measures of digital technology are improving at exponential rates related to Moore's law, including the size, cost, density, and speed of components. Moore wrote only about the density of components, "a component being a transistor, resistor, diode or capacitor",[129] at minimum cost.
Transistors per integrated circuit – The most popular formulation is of the doubling of the number of transistors on ICs every two years. At the end of the 1970s, Moore's law became known as the limit for the number of transistors on the most complex chips. The graph at the top of this article shows this trend holds true today. As of 2025[update], the commercially available processor possessing one of the highest numbers of transistors is aGB202 graphics processor with more than 92.2 billion transistors.[139]
Density at minimum cost per transistor – This is the formulation given in Moore's 1965 paper.[1] It is not just about the density of transistors that can be achieved, but about the density of transistors at which the cost per transistor is the lowest.[140]
As more transistors are put on a chip, the cost to make each transistor decreases, but the chance that the chip will not work due to a defect increases. In 1965, Moore examined the density of transistors at which cost is minimized, and observed that, as transistors were made smaller through advances inphotolithography, this number would increase at "a rate of roughly a factor of two per year".[1]
Dennard scaling – This posits that power usage would decrease in proportion to area (both voltage and current being proportional to length) of transistors. Combined with Moore's law,performance per watt would grow at roughly the same rate as transistor density, doubling every 1–2 years. According to Dennard scaling transistor dimensions would be scaled by 30% (0.7×) every technology generation, thus reducing their area by 50%. This would reduce the delay by 30% (0.7×) and therefore increase operating frequency by about 40% (1.4×). Finally, to keep electric field constant, voltage would be reduced by 30%, reducing energy by 65% and power (at 1.4× frequency) by 50%.[c] Therefore, in every technology generation transistor density would double, circuit becomes 40% faster, while power consumption (with twice the number of transistors) stays the same.[141] Dennard scaling ended in 2005–2010, due to leakage currents.[17]
The exponential processor transistor growth predicted by Moore does not always translate into exponentially greater practical CPU performance. Since around 2005–2007, Dennard scaling has ended, so even though Moore's law continued after that, it has not yielded proportional dividends in improved performance.[15][142] The primary reason cited for the breakdown is that at small sizes, current leakage poses greater challenges, and also causes the chip to heat up, which creates a threat ofthermal runaway and therefore, further increases energy costs.[15][142][17]
The breakdown of Dennard scaling prompted a greater focus on multicore processors, but the gains offered by switching to more cores are lower than the gains that would be achieved had Dennard scaling continued.[143][144] In another departure from Dennard scaling, Intel microprocessors adopted a non-planar tri-gate FinFET at 22 nm in 2012 that is faster and consumes less power than a conventional planar transistor.[145] The rate of performance improvement for single-core microprocessors has slowed significantly.[146] Single-core performance was improving by 52% per year in 1986–2003 and 23% per year in 2003–2011, but slowed to just seven percent per year in 2011–2018.[146]
Quality adjusted price of IT equipment – Theprice of information technology (IT), computers and peripheral equipment, adjusted for quality and inflation, declined 16% per year on average over the five decades from 1959 to 2009.[147][148] The pace accelerated, however, to 23% per year in 1995–1999 triggered by faster IT innovation,[130] and later, slowed to 2% per year in 2010–2013.[147][149]
Whilequality-adjusted microprocessor price improvement continues,[150] the rate of improvement likewise varies, and is not linear on a log scale. Microprocessor price improvement accelerated during the late 1990s, reaching 60% per year (halving every nine months) versus the typical 30% improvement rate (halving every two years) during the years earlier and later.[151][152] Laptop microprocessors in particular improved 25–35% per year in 2004–2010, and slowed to 15–25% per year in 2010–2013.[153]
The number of transistors per chip cannot explain quality-adjusted microprocessor prices fully.[151][154][155] Moore's 1995 paper does not limit Moore's law to strict linearity or to transistor count, "The definition of 'Moore's Law' has come to refer to almost anything related to the semiconductor industry that on asemi-log plot approximates a straight line. I hesitate to review its origins and by doing so restrict its definition."[129]
Hard disk drive areal density – A similar prediction (sometimes calledKryder's law) was made in 2005 forhard disk driveareal density.[156] The prediction was later viewed as over-optimistic. Several decades of rapid progress in areal density slowed around 2010, from 30 to 100% per year to 10–15% per year, because of noise related tosmaller grain size of the disk media, thermal stability, and writability using available magnetic fields.[157][158]
Fiber-optic capacity – The number of bits per second that can be sent down an optical fiber increases exponentially, faster than Moore's law.Keck's law, in honor ofDonald Keck.[159]
Network capacity – According to Gerald Butters,[160][161] the former head of Lucent's Optical Networking Group at Bell Labs, there is another version, called Butters' Law of Photonics,[162] a formulation that deliberately parallels Moore's law. Butters' law says that the amount of data coming out of an optical fiber is doubling every nine months.[163] Thus, the cost of transmitting a bit over an optical network decreases by half every nine months. The availability ofwavelength-division multiplexing (sometimes called WDM) increased the capacity that could be placed on a single fiber by as much as a factor of 100. Optical networking anddense wavelength-division multiplexing (DWDM) is rapidly bringing down the cost of networking, and further progress seems assured. As a result, the wholesale price of data traffic collapsed in thedot-com bubble.Nielsen's Law says that the bandwidth available to users increases by 50% annually.[164]
Pixels per dollar – Similarly, Barry Hendy of Kodak Australia has plotted pixels per dollar as a basic measure of value for a digital camera, demonstrating the historical linearity (on a log scale) of this market and the opportunity to predict the future trend of digital camera price,LCD andLED screens, and resolution.[165][166][167][168]
The great Moore's law compensator (TGMLC), also known asWirth's law, is the principle that successive generations of computer software increase in size and complexity (software bloat), thereby offsetting the performance gains predicted by Moore's law. In a 2008 article inInfoWorld, Randall C. Kennedy,[169] formerly of Intel, introduces this term using successive versions ofMicrosoft Office between the year 2000 and 2007 as his premise. Despite the gains in computational performance during this time period according to Moore's law, Office 2007 performed the same task at half the speed on a prototypical year 2007 computer as compared to Office 2000 on a year 2000 computer.[citation needed]
Library expansion – was calculated in 1945 byFremont Rider to double in capacity every 16 years, if sufficient space were made available.[170] He advocated replacing bulky, decaying printed works with miniaturizedmicroform analog photographs, which could be duplicated on-demand for library patrons or other institutions. He did not foresee the digital technology that would follow decades later to replace analog microform with digital imaging, storage, and transmission media. Automated, potentially lossless digital technologies allowed vast increases in the rapidity of information growth in an era that now sometimes is called theInformation Age.[citation needed]
Carlson curve – is a term coined byThe Economist[171] to describe the biotechnological equivalent of Moore's law, and is named after author Rob Carlson.[172] Carlson accurately predicted that the doubling time of DNA sequencing technologies (measured by cost and performance) would be at least as fast as Moore's law.[173] Carlson Curves illustrate the rapid (in some cases hyperexponential) decreases in cost, and increases in performance, of a variety of technologies, including DNA sequencing, DNA synthesis, and a range of physical and computational tools used in protein expression and in determining protein structures.[citation needed]
Eroom's law – is a pharmaceutical drug development observation that was deliberately written as Moore's Law spelled backward in order to contrast it with the exponential advancements of other forms of technology (such as transistors) over time. It states that the cost of developing a new drug roughly doubles every nine years.[citation needed]
Experience curve effects says that each doubling of the cumulative production of virtually any product or service is accompanied by an approximate constant percentage reduction in the unit cost. The acknowledged first documented qualitative description of this dates from 1885.[174][175] A power curve was used to describe this phenomenon in a 1936 discussion of the cost of airplanes.[176]
Haitz's law predicts that the brightness of LEDs increases as their manufacturing cost goes down.[citation needed]
Swanson's law is the observation that the price of solar photovoltaic modules tends to drop 20 percent for every doubling of cumulative shipped volume. At present rates, costs go down 75% about every 10 years.[citation needed]
^The trend begins with the invention of the integrated circuit in 1958. See the graph on the bottom of page 3 of Moore's original presentation of the idea.[1]
^In April 2005, Intel offered US$10,000 to purchase a copy of the originalElectronics issue in which Moore's article appeared.[10] An engineer living in the United Kingdom was the first to find a copy and offer it to Intel.[11]
^Engelbart, Douglas C. (February 12, 1960). "Microelectronics and the art of similitude".1960 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. III. IEEE. pp. 76–77.doi:10.1109/ISSCC.1960.1157297.
^Kovacich, Gerald L. (2016).The Information Systems Security Officer's Guide: Establishing and Managing a Cyber Security Program (3rd ed.). Oxford: Butterworth-Heinemann. p. 72.ISBN978-0-12-802190-3.
^Moore, Gordon (March 30, 2015)."Gordon Moore: The Man Whose Name Means Progress, The visionary engineer reflects on 50 years of Moore's Law".IEEE Spectrum: Special Report: 50 Years of Moore's Law (Interview). Interviewed by Rachel Courtland.We won't have the rate of progress that we've had over the last few decades. I think that's inevitable with any technology; it eventually saturates out. I guess I see Moore's law dying here in the next decade or so, but that's not surprising.
^Takahashi, Dean (April 18, 2005)."Forty years of Moore's law".Seattle Times. San Jose, California. RetrievedApril 7, 2015.A decade later, he revised what had become known as Moore's Law: The number of transistors on a chip would double every two years.
^abMoore, Gordon (1975)."IEEE Technical Digest 1975"(PDF). Intel Corp.Archived(PDF) from the original on October 9, 2022. RetrievedApril 7, 2015.... the rate of increase of complexity can be expected to change slope in the next few years as shown in Figure 5. The new slope might approximate a doubling every two years, rather than every year, by the end of the decade.
^Moore, Gordon (2006)."Chapter 7: Moore's law at 40"(PDF). In Brock, David (ed.).Understanding Moore's Law: Four Decades of Innovation. Chemical Heritage Foundation. pp. 67–84.ISBN978-0-941901-41-3. Archived fromthe original(PDF) on March 4, 2016. RetrievedMarch 22, 2018.
^"Over 6 Decades of Continued Transistor Shrinkage, Innovation"(PDF) (Press release).Intel Corporation. May 2011. Archived fromthe original on June 17, 2012. RetrievedMarch 25, 2023.1965: Moore's Law is born when Gordon Moore predicts that the number of transistors on a chip will double roughly every year (a decade later, in 1975, Moore published an update, revising the doubling period to every 2 years)
^Brock, David C., ed. (2006).Understanding Moore's law: four decades of innovation. Philadelphia, Pennsylvania: Chemical Heritage Foundation.ISBN978-0-941901-41-3.
^Meador, Dan; Goldsmith, Kevin (2022).Building Data Science Solutions with Anaconda: A comprehensive starter guide to building robust and complete models. Birmingham, UK: Packt Publishing Limited. p. 9.ISBN978-1-80056-878-5.
^"Moore's Law to roll on for another decade". RetrievedNovember 27, 2011.Moore also affirmed he never said transistor count would double every 18 months, as is commonly said. Initially, he said transistors on a chip would double every year. He then recalibrated it to every two years in 1975. David House, an Intel executive at the time, noted that the changes would cause computer performance to double every 18 months.
^Niccolai, James (July 15, 2015)."Intel pushes 10nm chip-making process to 2017, slowing Moore's Law".Infoworld. RetrievedJuly 16, 2015.It's official: Moore's Law is slowing down. ... "These transitions are a natural part of the history of Moore's Law and are a by-product of the technical challenges of shrinking transistors while ensuring they can be manufactured in high volume", Krzanich said.
^Conte, Thomas M.; Track, Elie; DeBenedictis, Erik (December 2015). "Rebooting Computing: New Strategies for Technology Scaling".Computer.48 (12):10–13.Bibcode:2015Compr..48l..10C.doi:10.1109/MC.2015.363.S2CID43750026.Year-over-year exponential computer performance scaling has ended. Complicating this is the coming disruption of the "technology escalator" underlying the industry: Moore's law.
^VerWey, John (July 2019).The Health and Competitiveness of the U.S. Semiconductor Manufacturing Equipment Industry(PDF) (Report). U.S. International Trade Commission. p. 17. RetrievedApril 30, 2024.The costs required to fabricate chips have increased in a predictable manner, operating under what is referred to Moore's Second Law or "Rock's Law", which says the cost of semiconductor tools doubles every four years.
^Sah, Chih-Tang;Wanlass, Frank (1963). "Nanowatt logic using field-effect metal-oxide semiconductor triodes".1963 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. VI. pp. 32–33.doi:10.1109/ISSCC.1963.1157450.
^Wanlass, F., "Low stand-by power complementary field effect circuitry",US 3356858, issued December 5, 1967 (filed June 18, 1963).
^Dennard, Robert H., "Field-effect transistor memory",US 3387286, issued June 4, 1968 (filed July 14, 1967)
^U.S. patent 4,491,628, "Positive and Negative Working Resist Compositions with Acid-Generating Photoinitiator and Polymer with Acid-Labile Groups Pendant From Polymer Backbone" J. M. J. Fréchet, H. Ito and C. G. Willson 1985.[1],Archived February 2, 2019, at theWayback Machine.
^Ito, Hiroshi; Willson, C. Grant; Frechet, Jean H. J. (1982). "New UV resists with negative or positive tone".VLSI Technology, 1982. Digest of Technical Papers. Symposium on.
^Lamola, A. A.; Szmanda, C. R.; Thackeray, J. W. (August 1991)."Chemically amplified resists".Solid State Technology.34 (8). RetrievedNovember 1, 2017.
^4458994 A US patent US 4458994 A, Kantilal Jain, Carlton G. Willson, "High resolution optical lithography method and apparatus having excimer laser light source and stimulated Raman shifting", issued July 10, 1984.
^Steigerwald, J. M. (2008). "Chemical mechanical polish: The enabling technology".2008 IEEE International Electron Devices Meeting. pp. 1–4.doi:10.1109/IEDM.2008.4796607.ISBN978-1-4244-2377-4.S2CID8266949. "Table1: 1990 enabling multilevel metallization; 1995 enabling STI compact isolation, polysilicon patterning and yield / defect reduction"
^Masuoka, Fujio; Takato, H.; Sunouchi, K.; Okabe, N.; Nitayama, A.; Hieda, K.; Horiguchi, F. (December 1988). "High performance CMOS surrounding gate transistor (SGT) for ultra high density LSIs".Technical Digest., International Electron Devices Meeting. pp. 222–225.doi:10.1109/IEDM.1988.32796.S2CID114148274.
^Clark, Don (July 15, 2015)."Intel Rechisels the Tablet on Moore's Law".Wall Street Journal Digits Tech News and Analysis. RetrievedJuly 16, 2015.The last two technology transitions have signaled that our cadence today is closer to two and a half years than two
^Nikonov, Dmitri E.; Young, Ian A. (February 1, 2013).Overview of Beyond-CMOS Devices and A Uniform Methodology for Their Benchmarking. Cornell University Library.arXiv:1302.0244.Bibcode:2013arXiv1302.0244N.
^Dewey, G.; Kotlyar, R.; Pillarisetty, R.; Radosavljevic, M.; Rakshit, T.; Then, H.; Chau, R. (December 7, 2009). "Logic performance evaluation and transport physics of Schottky-gate III–V compound semiconductor quantum well field effect transistors for power supply voltages (VCC) ranging from 0.5v to 1.0v".2009 IEEE International Electron Devices Meeting (IEDM). IEEE. pp. 1–4.doi:10.1109/IEDM.2009.5424314.ISBN978-1-4244-5639-0.S2CID41734511.
^Radosavljevic R, et al. (December 5, 2011). "Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/Gate-to-source separation".2011 International Electron Devices Meeting. IEEE. pp. 33.1.1–33.1.4.doi:10.1109/IEDM.2011.6131661.ISBN978-1-4577-0505-2.S2CID37889140.
^Schwierz, Frank (November 2010). "Graphene transistors — A new contender for future electronics".2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology. pp. 1202–1205.doi:10.1109/ICSICT.2010.5667602.ISBN978-1-4244-5797-7.
^Cross, Tim (March 12, 2016)."After Moore's Law".The Economist. The Economist Technology Quarterly. Archived fromthe original on March 13, 2016. RetrievedMarch 13, 2016.
^Keyes, Robert W. (September 2006). "The Impact of Moore's Law".IEEE Solid-State Circuits Society Newsletter.11 (3):25–27.doi:10.1109/N-SSC.2006.4785857.
^Nambiar, Raghunath; Poess, Meikel (2011). "Transaction Performance vs. Moore's Law: A Trend Analysis".Performance Evaluation, Measurement and Characterization of Complex Systems. Lecture Notes in Computer Science. Vol. 6417.Springer. pp. 110–120.doi:10.1007/978-3-642-18206-8_9.ISBN978-3-642-18205-1.S2CID31327565.
^Feroli, Michael (2013)."US: is I.T. over?"(PDF). JPMorgan Chase Bank NA Economic Research.Archived(PDF) from the original on May 17, 2014. RetrievedMay 15, 2014.
^Byrne, David M.; Oliner, Stephen D.; Sichel, Daniel E. (March 2013).Is the Information Technology Revolution Over?(PDF). Finance and Economics Discussion Series Divisions of Research & Statistics and Monetary Affairs Federal Reserve Board. Washington, D.C.: Federal Reserve Board Finance and Economics Discussion Series (FEDS).Archived(PDF) from the original on June 9, 2014.technical progress in the semiconductor industry has continued to proceed at a rapid pace ... Advances in semiconductor technology have driven down the constant-quality prices of MPUs and other chips at a rapid rate over the past several decades.
^Mellor, Chris (November 10, 2014)."Kryder's law craps out: Race to UBER-CHEAP STORAGE is OVER".theregister.co.uk. UK: The Register. RetrievedNovember 12, 2014.Currently 2.5-inch drives are at 500GB/platter with some at 600GB or even 667GB/platter – a long way from 20TB/platter. To reach 20TB by 2020, the 500GB/platter drives will have to increase areal density 44 times in six years. It isn't going to happen. ... Rosenthal writes: "The technical difficulties of migrating from PMR to HAMR, meant that already in 2010 the Kryder rate had slowed significantly and was not expected to return to its trend in the near future. The floods reinforced this."
^Carlson, Robert H. (September 2003). "The Pace and Proliferation of Biological Technologies".Biosecurity and Bioterrorism: Biodefense Strategy, Practice, and Science.1 (3):203–214.doi:10.1089/153871303769201851.PMID15040198.S2CID18913248.
Brock, David C., ed. (2006).Understanding Moore's Law: Four Decades of Innovation. Philadelphia: Chemical Heritage Foundation.ISBN0-941901-41-6.OCLC66463488.
Mody, Cyrus (2016).The Long Arm of Moore's law: Microelectronics and American Science. Cambridge, Massachusetts: Massachusetts Institute of Technology Press.ISBN978-0-262-03549-1.
Thackray, Arnold; Brock, David C.; Jones, Rachel (2015).Moore's Law: The Life of Gordon Moore, Silicon Valley's Quiet Revolutionary. New York: Basic Books.ISBN978-0-465-05564-7.OCLC0465055648.
Intel (IA-32) CPU speeds 1994–2005 – speed increases in recent years have seemed to slow with regard to percentage increase per year (available in PDF or PNG format)
.jpg)
