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Manycore processor

From Wikipedia, the free encyclopedia
Multi-core processor with a large number of cores

Manycore processors are special kinds ofmulti-core processors designed for a high degree ofparallel processing, containing numerous simpler, independentprocessor cores (from a few tens of cores to thousands or more). Manycore processors are used extensively inembedded computers andhigh-performance computing.

Contrast with multicore architecture

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Manycore processors are distinct frommulti-core processors in being optimized from the outset for a higher degree ofexplicit parallelism, and for higher throughput (or lower power consumption) at the expense of latency and lowersingle-thread performance.

The broader category ofmulti-core processors, by contrast, are usually designed to efficiently runboth paralleland serial code, and therefore place more emphasis on high single-thread performance (e.g. devoting more silicon toout-of-order execution, deeperpipelines, moresuperscalar execution units, and larger, more general caches), andshared memory. These techniques devote runtime resources toward figuring out implicit parallelism in a single thread. They are used in systems where they have evolved continuously (with backward compatibility) from single core processors. They usually have a 'few' cores (e.g. 2, 4, 8) and may be complemented by a manycoreaccelerator (such as aGPU) in aheterogeneous system.

Motivation

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Cache coherency is an issue limiting the scaling of multicore processors. Manycore processors may bypass this with methods such asmessage passing,[1]scratchpad memory,DMA,[2]partitioned global address space,[3] or read-only/non-coherent caches. A manycore processor using anetwork on a chip and local memories gives software the opportunity to explicitly optimise the spatial layout of tasks (e.g. as seen in tooling developed forTrueNorth).[4]

Manycore processors may have more in common (conceptually) with technologies originating inhigh-performance computing such asclusters andvector processors.[5]

GPUs may be considered a form of manycore processor having multipleshader processing units, and only being suitable for highly parallel code (high throughput, but extremely poor single thread performance).

Programming models

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Classes of manycore systems

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Specific manycore architectures

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Specific manycore computers with 1M+ CPU cores

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A number of computers built from multicore processors have one million or more individual CPU cores. Examples include:

Specific computers with 5 million or more CPU cores

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Quite a fewsupercomputers have over 5 million CPU cores. When there are also coprocessors, e.g. GPUs used with, then those cores are not listed in the core-count, then quite a few more computers would hit those targets.

See also

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References

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  1. ^Mattson, Tim (January 2010)."The Future of Many Core Computing: A tale of two processors"(PDF).
  2. ^Hendry, Gilbert; Kretschmann, Mark."IBM Cell Processor"(PDF). Archived fromthe original(PDF) on 2022-06-15. Retrieved2016-06-13.
  3. ^Olofsson, Andreas; Nordström, Tomas; Ul-Abdin, Zain (2014). "Kickstarting High-performance Energy-efficient Manycore Architectures with Epiphany".arXiv:1412.5538 [cs.AR].
  4. ^Amir, Arnon (June 11, 2015)."IBM SyNAPSE Deep Dive Part 3". IBM Research.Archived from the original on 2021-12-21.
  5. ^"cell architecture"."The Cell architecture is like nothing we have ever seen in commodity microprocessors, it is closer in design to multiprocessor vector supercomputers"
  6. ^Rick Merritt (June 20, 2011),"OEMs show systems with Intel MIC chips",www.eetimes.com,EE Times
  7. ^Barker, J; Bowden, J (2013). "Manycore Parallelism through OpenMP".OpenMP in the Era of Low Power Devices and Accelerators. IWOMP. Lecture Notes in Computer Science, vol 8122. Springer.doi:10.1007/978-3-642-40698-0_4.
  8. ^Morgan, Timothy Prickett (2021-02-10)."A First Peek At China's Sunway Exascale Supercomputer".The Next Platform. Retrieved2021-11-18.
  9. ^Hemsoth, Nicole (2021-04-19)."China's Exascale Prototype Supercomputer Tests AI Workloads".The Next Platform. Retrieved2021-11-18.
  10. ^Chen, Yu-Hsin; Krishna, Tushar; Emer, Joel;Sze, Vivienne (2016)."Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks".IEEE International Solid-State Circuits Conference, ISSCC 2016, Digest of Technical Papers. pp. 262–263.

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