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Machine Check Architecture

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Incomputing,Machine Check Architecture (MCA) is anIntel andAMD mechanism in which theCPU reports hardware errors to theoperating system.

Intel's P6 and Pentium 4 family processors,AMD's K7 and K8 family processors, as well as the Itanium architecture implement a machine check architecture that provides a mechanism for detecting and reporting hardware (machine) errors, such as: system bus errors,ECC errors, parity errors,cache errors, andtranslation lookaside buffer errors. It consists of a set of model-specific registers (MSRs) that are used to set up machine checking and additional banks of MSRs used for recording errors that are detected.[1]

See also

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References

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  1. ^"Machine Check Architecture".Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide, Part 2.Intel Corporation. November 2018.

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