Hennessy was raised inHuntington, New York, as one of six children.[10] His father was an aerospace engineer, and his mother was a teacher before raising her children.[10] He is of Irish-Catholic descent, with some of his ancestors arriving in America during the potato famine in the 19th century.[18]
Hennessy became a Stanford faculty member in 1977. In 1981, he began theMIPS project to investigateRISCprocessors, and in 1984, he used his sabbatical year to foundMIPS Computer Systems Inc. to commercialize the technology developed by his research. In 1987, he became the Willard and Inez Kerr Bell Endowed Professor of Electrical Engineering and Computer Science.[20]
Hennessy was director of Stanford's Computer System Laboratory (1989–93), a research center run by Stanford's Electrical Engineering and Computer Science departments. He was chair of the Department of Computer Science (1994–96) and Dean of the School of Engineering (1996–99).[20]
In 1999, Stanford PresidentGerhard Casper appointed Hennessy to succeedCondoleezza Rice asProvost of Stanford University. When Casper stepped down to focus on teaching in 2000, the Stanford Board of Trustees named Hennessy to succeed Casper as president. In 2008, Hennessy earned a salary of $1,091,589 ($702,771 base salary, $259,592 deferred benefits, $129,226 non-tax benefits), the 23rd highest among all American university presidents.[21]
In 2013, Hennessy became a judge for the inauguralQueen Elizabeth Prize for Engineering. He has remained on the judging panel for the subsequent awards in 2015 and 2017.
In June 2015, Hennessy announced that he would step down as Stanford president in summer 2016.[29]
In 2016, Hennessy co-founded theKnight-Hennessy Scholars program; he serves as its inaugural director. The program has a $750 million endowment to fully fund graduate students at Stanford for up to three years.[30][31] The inaugural class of 51 scholars from 21 countries arrived at Stanford in the fall of 2018.[32]
Hennessy has a history of strong interest and involvement in college-level computer education. He co-authored, withDavid Patterson, two well-known books oncomputer architecture,Computer Organization and Design: the Hardware/Software Interface andComputer Architecture: A Quantitative Approach,[5] which introduced theDLX RISC architecture. They have been widely used astextbooks for graduate and undergraduate courses since 1990.[35]
Elected to theNational Academy of Engineering:[36] 1992 For innovations in computer architecture and software techniques for reduced instruction set computers (RISC), and for quantitative evaluation methods for modern computer architectures.
IEEE Emanuel R. Piore Award –[37] 1994"For contributions to quantitative evaluation of computer architectures and the successful implementation of Reduced Instruction-Set Computer (RISC) architecture."
Fellow of theComputer History Museum –[42] 2007"for fundamental contributions to engineering education, advances in computer architecture, and the integration of leading-edge research with education"
IEEE Medal of Honor –[43][44] 2012"for pioneering the RISC processor architecture and for leadership in computer engineering and higher education"
Honorary Degree in Mathematics,University of Waterloo 2012"for profound contributions to modern computer architecture and to post-secondary education"
Turing Award –[46] 2017"for pioneering a systematic, quantitative approach to the design and evaluation of computer architectures with enduring impact on the microprocessor industry"
Gharachorloo, Kourosh; D. Lenoski; J. Laudon; P. Gibbons; A. Gupta; J. Hennessy (1990). "Memory consistency and event ordering in scalable shared-memory multiprocessors".Proceedings of the 17th annual international symposium on Computer Architecture. International Symposium on Computer Architecture. pp. 15–26.
Lenoski, Daniel; J. Laudon; K. Gharachorloo; A. Gupta; J. Hennessy (1990). "The directory-based cache coherence protocol for the DASH multiprocessor".Proceedings of the 17th annual international symposium on Computer Architecture. International Symposium on Computer Architecture. pp. 148–159.
^abcPatterson, David; Hennessy, John H.; Arpaci-Dusseau, Andrea C. (2007).Computer architecture: a quantitative approach. San Diego: Morgan Kaufmann.ISBN978-0-12-370490-0.
^"Jeffrey P. Bezos Biography Photo". 2001.A discussion on the future of technology at the 2001 Summit. Bezos is joined by Bell Labs President Dr. Jeong Kim, Microsoft's Dr. Charles Simonyi, Stanford President Dr. John L. Hennessy, and tech entrepreneur Dr. Kenan Sahin.
^Przybylski, S.; Horowitz, M.; Hennessy, J. (1989). "Characteristics of performance-optimal multi-level cache hierarchies".ACM SIGARCH Computer Architecture News.17 (3):114–121.doi:10.1145/74926.74939.
^Kuskin, J.; Horowitz, M.; Gupta, A.; Rosenblum, M.; Hennessy, J.; Ofelt, D.; Heinrich, M.; Heinlein, J.; Simoni, R.; Gharachorloo, K.; Chapin, J.; Nakahira, D.; Baxter, J. (1994). "The Stanford FLASH multiprocessor".ACM SIGARCH Computer Architecture News.22 (2):302–313.CiteSeerX10.1.1.467.9672.doi:10.1145/192007.192056.
