Theinstruction unit (I-unit orIU), also called, e.g.,instruction fetch unit (IFU),instruction issue unit (IIU),instruction sequencing unit (ISU), in acentral processing unit (CPU) is responsible for organizing program instructions to be fetched from memory, and executed, in an appropriate order, and for forwarding them to anexecution unit (E-unit orEU). The I-unit may also do, e.g., address resolution, pre-fetching, prior to forwarding an instruction. It is a part of thecontrol unit, which in turn is part of the CPU.[1]
In the simplest style ofcomputer architecture, theinstruction cycle is very rigid, and runs exactly as specified by theprogrammer. In the instruction fetch part of the cycle, the value of theinstruction pointer (IP) register is the address of the next instruction to be fetched. This value is placed on theaddress bus and sent to thememory unit; the memory unit returns the instruction at that address, and it is latched into theinstruction register (IR); and the value of the IP is incremented or over-written by a new value (in the case of a jump or branch instruction), ready for the next instruction cycle.
This becomes a lot more complicated, though, once performance-enhancing features are added, such asinstruction pipelining,out-of-order execution, and even just the introduction of a simpleinstruction cache.[2]
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