| Type ofRAM | |
| Developer | JEDEC |
|---|---|
| Type | Synchronous dynamic random-access memory |
| Generation | 4th generation |
| Predecessor | GDDR3 SDRAM |
| Successor | GDDR5 SDRAM |
Graphics Double Data Rate 4 Synchronous Dynamic Random-Access Memory (GDDR4 SDRAM) is a type ofgraphics cardmemory (SGRAM) specified by theJEDEC Semiconductor Memory Standard.[1][2] It is a rival medium toRambus'sXDR DRAM. GDDR4 is based onDDR3 SDRAM technology and was intended to replace theDDR2-basedGDDR3, but it ended up being replaced byGDDR5 (also based on DDR3) within a year.
GDDR4 SDRAM introduced DBI (Data Bus Inversion) and Multi-Preamble to reduce data transmission delay.Prefetch was increased from 4 to 8 bits. The maximum number of memory banks for GDDR4 has been increased to 8. Core voltage was decreased to 1.5 V.
Data Bus Inversion adds an additionalactive-low DBI# pin to the address/command bus and each byte of data. If there are at more than four 0 bits in the data byte, the byte is inverted and the DBI# signal transmitted low. In this way, the number of 0 bits across all nine pins is limited to four.[9]: 9 This reduces power consumption andground bounce.
On the signaling front, GDDR4 expands the chip I/O buffer to 8 bits per two cycles, allowing for greater sustained bandwidth during burst transmission, but at the expense of significantly increasedCAS latency (CL), determined mainly by the double reduced count of the address/command pins and half-clocked DRAM cells, compared to GDDR3. The number of addressing pins was reduced to half that of the GDDR3 core, and were used for power and ground, which also increases latency. Another advantage of GDDR4 is power efficiency: running at 2.4 Gbit/s, it uses 45% less power when compared to GDDR3 chips running at 2.0 Gbit/s.
In Samsung's GDDR4 SDRAM datasheet, it was referred as 'GDDR4 SGRAM', or 'Graphics Double Data Rate version 4 Synchronous Graphics RAM'. However, the essential block write feature is not available, so it is not classified asSGRAM.
The now-defunct video memory manufacturerQimonda (formerlyInfineon Memory Products division; IP sold toMicron) had stated it would "skip" the development of GDDR4, and move directly toGDDR5.[10]