Afloating-point unit (FPU),numeric processing unit (NPU),[1] colloquiallymath coprocessor, is a part of acomputer system specially designed to carry out operations onfloating-point numbers.[2] Typical operations areaddition,subtraction,multiplication,division, andsquare root. Modern designs generally include afused multiply-add instruction, which was found to be very common in real-world code. Some FPUs can also perform varioustranscendental functions such asexponential ortrigonometric calculations, but the accuracy can be low,[3][4] so some systems prefer to compute these functions in software.
Floating-point operations were originally handled insoftware in early computers. Over time, manufacturers began to provide standardized floating-point libraries as part of their software collections. Some machines, those dedicated to scientific processing, would include specialized hardware to perform some of these tasks with much greater speed. The introduction ofmicrocode in the 1960s allowed these instructions to be included in the system'sinstruction set architecture (ISA). Normally these would be decoded by the microcode into a series of instructions that were similar to the libraries, but on those machines with an FPU, they would instead be routed to that unit, which would perform them much faster. This allowed floating-point instructions to become universal while the floating-point hardware remained optional; for instance, on thePDP-11 one could add the floating-point processor unit at any time using plug-inexpansion cards.
The introduction of themicroprocessor in the 1970s led to a similar evolution as the earliermainframes andminicomputers. Earlymicrocomputer systems performed floating point in software, typically in a vendor-specific library included inROM. Dedicated single-chip FPUs began to appear late in the decade, but they remained rare in real-world systems until the mid-1980s, and using them required software to be re-written to call them. As they became more common, the software libraries were modified to work like the microcode of earlier machines, performing the instructions on the main CPU if needed, but offloading them to the FPU if one was present. By the late 1980s,semiconductor manufacturing had improved to the point where it became possible to include an FPU with the main CPU, resulting in designs like thei486 and68040. These designs were known as an "integrated FPU"s, and from the mid-1990s, FPUs were a standard feature of most CPU designs except those designed as low-cost asembedded processors.
In modern designs, a single CPU will typically include severalarithmetic logic units (ALUs) and several FPUs, reading many instructions at the same time and routing them to the various units for parallel execution. By the 2000s, even embedded processors generally included an FPU as well.
In 1954, theIBM 704 had floating-point arithmetic as a standard feature, one of its major improvements over its predecessor theIBM 701. This was carried forward to its successors the 709, 7090, and 7094.
In 1963, Digital announced thePDP-6, which had floating point as a standard feature.[5]
In 1963, theGE-235 featured an "Auxiliary Arithmetic Unit" for floating point and double-precision calculations.[6]
Historically, some systems implementedfloating point with acoprocessor rather than as an integrated unit (but now in addition to the CPU, e.g.GPUs – that are coprocessors not always built into the CPU – have FPUs as a rule, while first generations of GPUs did not). This could be a singleintegrated circuit, an entirecircuit board or a cabinet. Where floating-point calculation hardware has not been provided, floating-point calculations are done in software, which takes more processor time, but avoids the cost of the extra hardware. For a particular computer architecture, the floating-point unit instructions may beemulated by a library of software functions; this may permit the sameobject code to run on systems with or without floating-point hardware. Emulation can be implemented on any of several levels: in the CPU asmicrocode, as anoperating system function, or inuser-space code. When only integer functionality is available, theCORDIC methods are most commonly used fortranscendental function evaluation.[citation needed]
In most modern computer architectures, there is some division of floating-point operations frominteger operations. This division varies significantly by architecture; some have dedicated floating-point registers, while some, likeIntel x86, go as far as independentclocking schemes.[7]
CORDIC routines have been implemented inIntel x87 coprocessors (8087,[8][9][10][11][12] 80287,[12][13] 80387[12][13]) up to the80486[8] microprocessor series, as well as in theMotorola 68881[8][9] and 68882 for some kinds of floating-point instructions, mainly as a way to reduce thegate counts (and complexity) of the FPU subsystem.
Floating-point operations are oftenpipelined. In earliersuperscalar architectures without generalout-of-order execution, floating-point operations were sometimes pipelined separately from integer operations.
The modular architecture ofBulldozer microarchitecture uses a special FPU named FlexFPU, which usessimultaneous multithreading. Each physical integer core, two per module, is single-threaded, in contrast with Intel'sHyperthreading, where two virtual simultaneous threads share the resources of a single physical core.[14][15]
Some floating-point hardware only supports the simplest operations: addition, subtraction, and multiplication. But even the most complex floating-point hardware has a finite number of operations it can support – for example, no FPUs directly supportarbitrary-precision arithmetic.
When a CPU is executing a program that calls for a floating-point operation that is not directly supported by the hardware, the CPU uses a series of simpler floating-point operations. In systems without any floating-point hardware, the CPUemulates it using a series of simplerfixed-point arithmetic operations that run on the integerarithmetic logic unit.
The software that lists the necessary series of operations to emulate floating-point operations is often packaged in a floating-pointlibrary.
In some cases, FPUs may be specialized, and divided between simpler floating-point operations (mainly addition and multiplication) and more complicated operations, like division. In some cases, only the simple operations may be implemented in hardware ormicrocode, while the more complex operations are implemented as software.
In some current architectures, the FPU functionality is combined withSIMD units to perform SIMD computation; an example of this is the augmentation of thex87 instructions set withSSE instruction set in thex86-64 architecture used in newer Intel and AMD processors.
Several models of thePDP-11, such as the PDP-11/45,[16] PDP-11/34a,[17]: 184–185 PDP-11/44,[17]: 195, 211 and PDP-11/70,[17]: 277, 286–287 supported an add-on floating-point unit to support floating-point instructions. The PDP-11/60,[17]: 261 MicroPDP-11/23[18] and severalVAX models[19][20] could execute floating-point instructions without an add-on FPU (the MicroPDP-11/23 required an add-on microcode option),[18] and offered add-on accelerators to further speed the execution of those instructions.
In the 1980s, it was common inIBM PC/compatiblemicrocomputers for the FPU to be entirely separate from theCPU, and typically sold as an optional add-on. It would only be purchased if needed to speed up or enable math-intensive programs.
The IBM PC,XT, and most compatibles based on the 8088 or 8086 had a socket for the optional 8087 coprocessor. TheAT and80286-based systems were generally socketed for the80287, and80386/80386SX-based machines – for the80387 and80387SX respectively, although early ones were socketed for the 80287, since the 80387 did not exist yet. Other companies manufactured co-processors for the Intel x86 series. These includedCyrix andWeitek.Acorn Computers opted for the WE32206 to offersingle,double andextended precision[21] to itsARM poweredArchimedes range, introducing a gate array to interface the ARM2 processor with the WE32206 to support the additional ARM floating-point instructions.[22] Acorn later offered the FPA10 coprocessor, developed by ARM, for various machines fitted with the ARM3 processor.[23]
Coprocessors were available for theMotorola 68000 family, the68881 and 68882. These were common inMotorola 68020/68030-basedworkstations, like theSun-3 series. They were also commonly added to higher-end models of AppleMacintosh and CommodoreAmiga series, but unlike IBM PC-compatible systems, sockets for adding the coprocessor were not as common in lower-end systems.
There are also add-on FPU coprocessor units formicrocontroller units (MCUs/μCs)/single-board computer (SBCs), which serve to provide floating-pointarithmetic capability. These add-on FPUs are host-processor-independent, possess their own programming requirements (operations,instruction sets, etc.) and are often provided with their ownintegrated development environments (IDEs).
