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Finite-state machine

From Wikipedia, the free encyclopedia
(Redirected fromFinite-state automaton)
Mathematical model of computation
"State machine" redirects here. For infinite-state machines, seeTransition system. For fault-tolerance methodology, seeState machine replication.
"SFSM" redirects here. For the Italian railway company, seeCircumvesuviana.
"Finite automata" redirects here. For the electro-industrial group, seeFinite Automata (band).

Afinite-state machine (FSM) orfinite-state automaton (FSA, plural:automata),finite automaton, or simply astate machine, is a mathematicalmodel of computation. It is anabstract machine that can be in exactly one of a finite number ofstates at any given time. The FSM can change from one state to another in response to someinputs; the change from one state to another is called atransition.[1] An FSM is defined by a list of its states, its initial state, and the inputs that trigger each transition. Finite-state machines are of two types—deterministic finite-state machines andnon-deterministic finite-state machines.[2][better source needed] For any non-deterministic finite-state machine, an equivalent deterministic one can be constructed.[citation needed]

The behavior of state machines can be observed in many devices in modern society that perform a predetermined sequence of actions depending on a sequence of events with which they are presented. Simple examples arevending machines, which dispense products when the proper combination of coins is deposited;elevators, whose sequence of stops is determined by the floors requested by riders;traffic lights, which change sequence when cars are waiting; andcombination locks, which require the input of a sequence of numbers in the proper order.

The finite-state machine has less computational power than some other models of computation such as theTuring machine.[3] The computational power distinction means there are computational tasks that a Turing machine can do but an FSM cannot. This is because an FSM'smemory is limited by the number of states it has. A finite-state machine has the same computational power as a Turing machine that is restricted such that its head may only perform "read" operations, and always has to move from left to right. FSMs are studied in the more general field ofautomata theory.

Example: coin-operated turnstile

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State diagram for a turnstile
A turnstile

An example of a simple mechanism that can be modeled by a state machine is aturnstile.[4][5] A turnstile, used to control access to subways and amusement park rides, is a gate with three rotating arms at waist height, one across the entryway. Initially the arms are locked, blocking the entry, preventing patrons from passing through. Depositing a coin ortoken in a slot on the turnstile unlocks the arms, allowing a single customer to push through. After the customer passes through, the arms are locked again until another coin is inserted.

Considered as a state machine, the turnstile has two possible states:Locked andUnlocked.[4] There are two possible inputs that affect its state: putting a coin in the slot (coin) and pushing the arm (push). In the locked state, pushing on the arm has no effect; no matter how many times the inputpush is given, it stays in the locked state. Putting a coin in – that is, giving the machine acoin input – shifts the state fromLocked toUnlocked. In the unlocked state, putting additional coins in has no effect; that is, giving additionalcoin inputs does not change the state. A customer pushing through the arms gives apush input and resets the state toLocked.

The turnstile state machine can be represented by astate-transition table, showing for each possible state, the transitions between them (based upon the inputs given to the machine) and the outputs resulting from each input:

Current StateInputNext StateOutput
LockedcoinUnlockedUnlocks the turnstile so that the customer can push through.
pushLockedNone
UnlockedcoinUnlockedNone
pushLockedWhen the customer has pushed through, locks the turnstile.

The turnstile state machine can also be represented by adirected graph called astate diagram(above). Each state is represented by anode (circle). Edges (arrows) show the transitions from one state to another. Each arrow is labeled with the input that triggers that transition. An input that doesn't cause a change of state (such as acoin input in theUnlocked state) is represented by a circular arrow returning to the original state. The arrow into theLocked node from the black dot indicates it is the initial state.

Concepts and terminology

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Astate is a description of the status of a system that is waiting to execute atransition. A transition is a set of actions to be executed when a condition is fulfilled or when an event is received.For example, when using an audio system to listen to the radio (the system is in the "radio" state), receiving a "next" stimulus results in moving to the next station. When the system is in the "CD" state, the "next" stimulus results in moving to the next track. Identical stimuli trigger different actions depending on the current state.

In some finite-state machine representations, it is also possible to associate actions with a state:

  • an entry action: performedwhen entering the state, and
  • an exit action: performedwhen exiting the state.

Representations

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Fig. 1 UML state chart example (a toaster oven)
Fig. 2 SDL state machine example
Fig. 3 Example of a simple finite-state machine
For an introduction, seeState diagram.

State/Event table

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Severalstate-transition table types are used. The most common representation is shown below: the combination of current state (e.g. B) and input (e.g. Y) shows the next state (e.g. C). By itself, the table cannot completely describe the action, so it is common to use footnotes. Other related representations may not have this limitation. For example, an FSM definition including the full action's information is possible usingstate tables (see alsovirtual finite-state machine).

State-transition table
  Current
state
Input
State AState BState C
Input X.........
Input Y...State C...
Input Z.........

UML state machines

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TheUnified Modeling Language has a notation for describing state machines.UML state machines overcome the limitations[citation needed] of traditional finite-state machines while retaining their main benefits. UML state machines introduce the new concepts ofhierarchically nested states andorthogonal regions, while extending the notion ofactions. UML state machines have the characteristics of bothMealy machines andMoore machines. They supportactions that depend on both the state of the system and the triggeringevent, as in Mealy machines, as well asentry and exit actions, which are associated with states rather than transitions, as in Moore machines.[citation needed]

SDL state machines

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TheSpecification and Description Language is a standard fromITU that includes graphical symbols to describe actions in the transition:

  • send an event
  • receive an event
  • start a timer
  • cancel a timer
  • start another concurrent state machine
  • decision

SDL embeds basic data types called "Abstract Data Types", an action language, and an execution semantic in order to make the finite-state machine executable.[citation needed]

Other state diagrams

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There are a large number of variants to represent an FSM such as the one in figure 3.

Usage

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In addition to their use in modeling reactive systems presented here, finite-state machines are significant in many different areas, includingelectrical engineering,linguistics,computer science,philosophy,biology,mathematics,video game programming, andlogic. Finite-state machines are a class of automata studied inautomata theory and thetheory of computation.In computer science, finite-state machines are widely used in modeling of application behavior (control theory), design ofhardware digital systems,software engineering,compilers,network protocols, andcomputational linguistics.

Classification

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Finite-state machines can be subdivided into acceptors, classifiers, transducers and sequencers.[6]

Acceptors

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Fig. 4: Acceptor FSM: parsing the string "nice".
Fig. 5: Representation of an acceptor; this example shows one that determines whether a binary number has an even number of 0s, whereS1 is anaccepting state andS2 is anon accepting state.

Acceptors (also calleddetectors orrecognizers) produce binary output, indicating whether or not the received input is accepted. Each state of an acceptor is eitheraccepting ornon accepting. Once all input has been received, if the current state is an accepting state, the input is accepted; otherwise it is rejected. As a rule, input is asequence of symbols (characters); actions are not used. The start state can also be an accepting state, in which case the acceptor accepts the empty string. The example in figure 4 shows an acceptor that accepts the string "nice". In this acceptor, the only accepting state is state 7.

A (possibly infinite) set of symbol sequences, called aformal language, is aregular language if there is some acceptor that acceptsexactly that set.[7] For example, the set of binary strings with an even number of zeroes is a regular language (cf. Fig. 5), while the set of all strings whose length is a prime number is not.[8]

An acceptor could also be described as defining a language that would contain every string accepted by the acceptor but none of the rejected ones; that language isaccepted by the acceptor. By definition, the languages accepted by acceptors are theregular languages.

The problem of determining the language accepted by a given acceptor is an instance of thealgebraic path problem—itself a generalization of theshortest path problem to graphs with edges weighted by the elements of an (arbitrary)semiring.[9][10][jargon]

An example of an accepting state appears in Fig. 5: adeterministic finite automaton (DFA) that detects whether thebinary input string contains an even number of 0s.

S1 (which is also the start state) indicates the state at which an even number of 0s has been input. S1 is therefore an accepting state. This acceptor will finish in an accept state, if the binary string contains an even number of 0s (including any binary string containing no 0s). Examples of strings accepted by this acceptor areε (theempty string), 1, 11, 11..., 00, 010, 1010, 10110, etc.

Classifiers

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Classifiers are a generalization of acceptors that producen-ary output wheren is strictly greater than two.[11]

Transducers

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Main article:Finite-state transducer
Fig. 6 Transducer FSM: Moore model example
Fig. 7 Transducer FSM: Mealy model example

Transducers produce output based on a given input and/or a state using actions. They are used for control applications and in the field ofcomputational linguistics.

In control applications, two types are distinguished:

Moore machine
The FSM uses only entry actions, i.e., output depends only on state. The advantage of the Moore model is a simplification of the behaviour. Consider an elevator door. The state machine recognizes two commands: "command_open" and "command_close", which trigger state changes. The entry action (E:) in state "Opening" starts a motor opening the door, the entry action in state "Closing" starts a motor in the other direction closing the door. States "Opened" and "Closed" stop the motor when fully opened or closed. They signal to the outside world (e.g., to other state machines) the situation: "door is open" or "door is closed".
Mealy machine
The FSM also uses input actions, i.e., output depends on input and state. The use of a Mealy FSM leads often to a reduction of the number of states. The example in figure 7 shows a Mealy FSM implementing the same behaviour as in the Moore example (the behaviour depends on the implemented FSM execution model and will work, e.g., forvirtual FSM but not forevent-driven FSM). There are two input actions (I:): "start motor to close the door if command_close arrives" and "start motor in the other direction to open the door if command_open arrives". The "opening" and "closing" intermediate states are not shown.

Sequencers

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Sequencers (also calledgenerators) are a subclass of acceptors and transducers that have a single-letter input alphabet. They produce only one sequence, which can be seen as an output sequence of acceptor or transducer outputs.[6]

Determinism

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A further distinction is betweendeterministic (DFA) andnon-deterministic (NFA,GNFA) automata. In a deterministic automaton, every state has exactly one transition for each possible input. In a non-deterministic automaton, an input can lead to one, more than one, or no transition for a given state. Thepowerset construction algorithm can transform any nondeterministic automaton into a (usually more complex) deterministic automaton with identical functionality.

A finite-state machine with only one state is called a "combinatorial FSM". It only allows actions upon transitioninto a state. This concept is useful in cases where a number of finite-state machines are required to work together, and when it is convenient to consider a purely combinatorial part as a form of FSM to suit the design tools.[12]

Alternative semantics

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There are other sets of semantics available to represent state machines. For example, there are tools for modeling and designing logic for embedded controllers.[13] They combinehierarchical state machines (which usually have more than one current state), flow graphs, andtruth tables into one language, resulting in a different formalism and set of semantics.[14] These charts, likeHarel's original state machines,[15] support hierarchically nested states,orthogonal regions, state actions, and transition actions.[16]

Mathematical model

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In accordance with the general classification, the following formal definitions are found.

Adeterministic finite-state machine ordeterministic finite-state acceptor is aquintuple(Σ,S,s0,δ,F){\displaystyle (\Sigma ,S,s_{0},\delta ,F)}, where:

For both deterministic and non-deterministic FSMs, it is conventional to allowδ{\displaystyle \delta } to be apartial function, i.e.δ(s,x){\displaystyle \delta (s,x)} does not have to be defined for every combination ofsS{\displaystyle s\in S} andxΣ{\displaystyle x\in \Sigma }. If an FSMM{\displaystyle M} is in a states{\displaystyle s}, the next symbol isx{\displaystyle x} andδ(s,x){\displaystyle \delta (s,x)} is not defined, thenM{\displaystyle M} can announce an error (i.e. reject the input). This is useful in definitions of general state machines, but less useful when transforming the machine. Some algorithms in their default form may require total functions.

A finite-state machine has the same computational power as aTuring machine that is restricted such that its head may only perform "read" operations, and always has to move from left to right. That is, each formal language accepted by a finite-state machine is accepted by such a kind of restricted Turing machine, and vice versa.[17]

Afinite-state transducer is asextuple(Σ,Γ,S,s0,δ,ω){\displaystyle (\Sigma ,\Gamma ,S,s_{0},\delta ,\omega )}, where:

If the output function depends on the state and input symbol (ω:S×ΣΓ{\displaystyle \omega :S\times \Sigma \rightarrow \Gamma }) that definition corresponds to theMealy model, and can be modelled as aMealy machine. If the output function depends only on the state (ω:SΓ{\displaystyle \omega :S\rightarrow \Gamma }) that definition corresponds to theMoore model, and can be modelled as aMoore machine. A finite-state machine with no output function at all is known as asemiautomaton ortransition system.

If we disregard the first output symbol of a Moore machine,ω(s0){\displaystyle \omega (s_{0})}, then it can be readily converted to an output-equivalent Mealy machine by setting the output function of every Mealy transition (i.e. labeling every edge) with the output symbol given of the destination Moore state. The converse transformation is less straightforward because a Mealy machine state may have different output labels on its incoming transitions (edges). Every such state needs to be split in multiple Moore machine states, one for every incident output symbol.[18]

Optimization

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Main article:DFA minimization

Optimizing an FSM means finding a machine with the minimum number of states that performs the same function. The fastest known algorithm doing this is theHopcroft minimization algorithm.[19][20] Other techniques include using animplication table, or the Moore reduction procedure.[21] Additionally, acyclic FSAs can be minimized inlinear time.[22]

Implementation

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Hardware applications

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Fig. 9 Thecircuit diagram for a 4-bitTTL counter, a type of state machine

In adigital circuit, an FSM may be built using aprogrammable logic device, aprogrammable logic controller,logic gates andflip flops orrelays. More specifically, a hardware implementation requires aregister to store state variables, a block ofcombinational logic that determines the state transition, and a second block of combinational logic that determines the output of an FSM.

In aMedvedev machine, the output is directly connected to the state flip-flops minimizing the time delay between flip-flops and output.[23][24]

Throughstate encoding for low power state machines may be optimized to minimize power consumption.

Software applications

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The following concepts are commonly used to build software applications with finite-state machines:

Finite-state machines and compilers

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Finite automata are often used in thefrontend of programming language compilers. Such a frontend may comprise several finite-state machines that implement alexical analyzer and a parser.Starting from a sequence of characters, the lexical analyzer builds a sequence of language tokens (such as reserved words, literals, and identifiers) from which the parser builds a syntax tree. The lexical analyzer and the parser handle the regular andcontext-free parts of the programming language's grammar.[25]

See also

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References

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  1. ^Wang, Jiacun (2019).Formal Methods in Computer Science. CRC Press. p. 34.ISBN 978-1-4987-7532-8.
  2. ^"Finite State Machines – Brilliant Math & Science Wiki".brilliant.org. Retrieved2018-04-14.
  3. ^Belzer, Jack; Holzman, Albert George; Kent, Allen (1975).Encyclopedia of Computer Science and Technology. Vol. 25. USA: CRC Press. p. 73.ISBN 978-0-8247-2275-3.
  4. ^abKoshy, Thomas (2004).Discrete Mathematics With Applications. Academic Press. p. 762.ISBN 978-0-12-421180-3.
  5. ^Wright, David R. (2005)."Finite State Machines"(PDF).CSC215 Class Notes. David R. Wright website, N. Carolina State Univ. Archived fromthe original(PDF) on 2014-03-27. Retrieved2012-07-14.
  6. ^abKeller, Robert M. (2001)."Classifiers, Acceptors, Transducers, and Sequencers"(PDF).Computer Science: Abstraction to Implementation(PDF). Harvey Mudd College. p. 480.
  7. ^Hopcroft & Ullman 1979, pp. 18.
  8. ^Hopcroft, Motwani & Ullman 2006, pp. 130–1.
  9. ^Pouly, Marc; Kohlas, Jürg (2011).Generic Inference: A Unifying Theory for Automated Reasoning. John Wiley & Sons. Chapter 6. Valuation Algebras for Path Problems, p. 223 in particular.ISBN 978-1-118-01086-0.
  10. ^Jacek Jonczy (Jun 2008)."Algebraic path problems"(PDF). Archived fromthe original(PDF) on 2014-08-21. Retrieved2014-08-20., p. 34
  11. ^Felkin, M. (2007). Guillet, Fabrice; Hamilton, Howard J. (eds.).Quality Measures in Data Mining - Studies in Computational Intelligence. Vol. 43. Springer, Berlin, Heidelberg. pp. 277–278.doi:10.1007/978-3-540-44918-8_12.ISBN 978-3-540-44911-9.
  12. ^Brutscheck, M., Berger, S., Franke, M., Schwarzbacher, A., Becker, S.: Structural Division Procedure for Efficient IC Analysis. IET IrishSignals and Systems Conference, (ISSC 2008), pp.18–23. Galway, Ireland, 18–19 June 2008.[1]
  13. ^"Tiwari, A. (2002). Formal Semantics and Analysis Methods for Simulink Stateflow Models"(PDF).sri.com. Retrieved2018-04-14.
  14. ^Hamon, G. (2005).A Denotational Semantics for Stateflow. International Conference on Embedded Software. Jersey City, NJ: ACM. pp. 164–172.CiteSeerX 10.1.1.89.8817.
  15. ^"Harel, D. (1987). A Visual Formalism for Complex Systems. Science of Computer Programming, 231–274"(PDF). Archived fromthe original(PDF) on 2011-07-15. Retrieved2011-06-07.
  16. ^"Alur, R., Kanade, A., Ramesh, S., & Shashidhar, K. C. (2008). Symbolic analysis for improving simulation coverage of Simulink/Stateflow models. International Conference on Embedded Software (pp. 89–98). Atlanta, GA: ACM"(PDF). Archived fromthe original(PDF) on 2011-07-15.
  17. ^Black, Paul E (12 May 2008)."Finite State Machine".Dictionary of Algorithms and Data Structures. U.S.National Institute of Standards and Technology. Archived fromthe original on 13 October 2018. Retrieved2 November 2016.
  18. ^Anderson, James Andrew; Head, Thomas J. (2006).Automata theory with modern applications. Cambridge University Press. pp. 105–108.ISBN 978-0-521-84887-9.
  19. ^Hopcroft, John (1971),"Ann logn algorithm for minimizing states in a finite automaton",Theory of Machines and Computations, Elsevier, pp. 189–196,doi:10.1016/b978-0-12-417750-5.50022-1,ISBN 978-0-12-417750-5, retrieved2025-09-18
  20. ^Almeida, Marco; Moreira, Nelma; Reis, Rogerio (2007).On the performance of automata minimization algorithms(PDF) (Technical Report). Vol. DCC-2007-03. Porto Univ. Archived fromthe original(PDF) on 17 January 2009. Retrieved25 June 2008.
  21. ^Edward F. Moore (1956). C.E. Shannon and J. McCarthy (ed.). "Gedanken-Experiments on Sequential Machines".Annals of Mathematics Studies.34. Princeton University Press:129–153. Here: Theorem 4, p.142.
  22. ^Revuz, D. (1992). "Minimization of Acyclic automata in Linear Time".Theoretical Computer Science.92:181–189.doi:10.1016/0304-3975(92)90142-3.
  23. ^Kaeslin, Hubert (2008)."Mealy, Moore, Medvedev-type and combinatorial output bits".Digital Integrated Circuit Design: From VLSI Architectures to CMOS Fabrication. Cambridge University Press. p. 787.ISBN 978-0-521-88267-5.
  24. ^SlidesArchived 18 January 2017 at theWayback Machine,Synchronous Finite State Machines; Design and Behaviour,University of Applied Sciences Hamburg, p.18
  25. ^Aho, Alfred V.;Sethi, Ravi;Ullman, Jeffrey D. (1986).Compilers: Principles, Techniques, and Tools (1st ed.).Addison-Wesley.ISBN 978-0-201-10088-4.

Sources

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Further reading

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General

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Finite-state machines (automata theory) in theoretical computer science

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Abstract state machines in theoretical computer science

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Machine learning using finite-state algorithms

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  • Mitchell, Tom M. (1997).Machine Learning (1st ed.). New York: WCB/McGraw-Hill Corporation.ISBN 978-0-07-042807-2.

Hardware engineering: state minimization and synthesis of sequential circuits

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  • Booth, Taylor L. (1967).Sequential Machines and Automata Theory (1st ed.). New York: John Wiley and Sons, Inc. Library of Congress Card Catalog Number 67-25924.
  • Booth, Taylor L. (1971).Digital Networks and Computer Systems (1st ed.). New York: John Wiley and Sons, Inc.ISBN 978-0-471-08840-0.
  • McCluskey, E. J. (1965).Introduction to the Theory of Switching Circuits (1st ed.). New York: McGraw-Hill Book Company, Inc. Library of Congress Card Catalog Number 65-17394.
  • Hill, Fredrick J.; Peterson, Gerald R. (1965).Introduction to the Theory of Switching Circuits (1st ed.). New York: McGraw-Hill Book Company. Library of Congress Card Catalog Number 65-17394.

Finite Markov chain processes

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"We may think of aMarkov chain as a process that moves successively through a set of statess1,s2, …,sr. … if it is in statesi it moves on to the next stop to statesj with probabilitypij. These probabilities can be exhibited in the form of a transition matrix" (Kemeny (1959), p. 384)

Finite Markov-chain processes are also known assubshifts of finite type.

  • Booth, Taylor L. (1967).Sequential Machines and Automata Theory (1st ed.). New York: John Wiley and Sons, Inc. Library of Congress Card Catalog Number 67-25924.
  • Kemeny, John G.; Mirkil, Hazleton; Snell, J. Laurie; Thompson, Gerald L. (1959).Finite Mathematical Structures (1st ed.). Englewood Cliffs, N.J.: Prentice-Hall, Inc. Library of Congress Card Catalog Number 59-12841. Chapter 6 "Finite Markov Chains".

External links

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