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File:RV32IMAC Instruction Set.svg

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Original file(SVG file, nominally 994 × 638 pixels, file size: 136 KB)

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Summary

DescriptionRV32IMAC Instruction Set.svg

English: This illustration shows all true assembly language instructions available in the Base Integer ISA, and the ISA extensions for Multiplication and Division, Atomic Instructions, and Compressed Instructions. This constitutes the RV32IMAC variant of the RISC-V ISA.These ISAs are shown in a color-coded modular fashion.

Date

15 May 2022

Source

Own work using:Inkscape. This is the first illustration of a series on the RISC-V ISAs, which is available onrisc-v-diagrams on GitHub

Author

Eduardo Corpeño

Other versions

This image shows some kind of simple table that could be converted to awikitable. Storing tables as images makes it harder to change (update, translate, …) them. Wikitables also help making sure to be consistent in font and size.

Deutsch ∙English ∙español ∙italiano ∙日本語 ∙македонски ∙മലയാളം ∙português do Brasil ∙русский ∙slovenščina ∙+/−

SVG development

InfoField

The source code of thisSVG isinvalid due to an error.

This W3C-invalid diagram was created withInkscape …important.

This diagram usesembedded text that can beeasily translated using a text editor.

Licensing

I, the copyright holder of this work, hereby publish it under the following license:

This file is licensed under theCreative Commons Attribution-Share Alike 4.0 International license.

You are free:

to share – to copy, distribute and transmit the work
to remix – to adapt the work

Under the following conditions:

attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
share alike – If you remix, transform, or build upon the material, you must distribute your contributions under thesame or compatible license as the original.

https://creativecommons.org/licenses/by-sa/4.0CC BY-SA 4.0Creative Commons Attribution-Share Alike 4.0truetrue

Captions

English

An illustration of the RISC-V instruction set for the RV32IMAC variant

Items portrayed in this file

depicts

instruction set

instruction set architecture

RISC-V

creator

some value

URL:https://commons.wikimedia.org/wiki/User:Kuashio

Wikimedia username:Kuashio

author name string:Eduardo Corpeño

copyright status

copyrighted

copyright license

Creative Commons Attribution-ShareAlike 4.0 International

inception

15 May 2022

source of file

original creation by uploader

media type

image/svg+xml

File history

Click on a date/time to view the file as it appeared at that time.

	Date/Time	Dimensions	User	Comment
current	21:44, 2 December 2023	994 × 638(136 KB)	Kuashio	Moved immediate instructions one position down
	21:22, 2 December 2023	994 × 638(136 KB)	Kuashio	Updated from 2018 version of RV32I which included Zifencei and Zicsr
	14:49, 17 May 2022	994 × 638(144 KB)	Kuashio	Reverted to version as of 02:24, 17 May 2022 (UTC)
	14:47, 17 May 2022	994 × 638(141 KB)	Kuashio	changed to plain svg
	02:24, 17 May 2022	994 × 638(144 KB)	Kuashio	moved text again
	01:49, 17 May 2022	994 × 638(144 KB)	Kuashio	Separated text descriptions from ISA name
	15:05, 16 May 2022	994 × 638(144 KB)	Kuashio	Reduced the margin
	03:03, 16 May 2022	1,056 × 688(140 KB)	Kuashio	Uploaded own work with UploadWizard