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TheFujitsuFR-V (FujitsuRISC-VLIW) is one of the very fewprocessors ever able to process both avery long instruction word (VLIW) andvector processorinstructions at the same time, increasingthroughput with highparallel computing while increasingperformance per watt andhardware efficiency. The family was presented in 1999.[1] Its design was influenced by the VPP500/5000 models of theFujitsu VP/2000 vector processorsupercomputer line.[2]
Featuring a 1–8 way very long instruction word (VLIW,Multiple Instruction Multiple Data (MIMD), up to 256 bit) instruction set it additionally uses a 4-waysingle instruction, multiple data (SIMD) vector processor core. A32-bitRISC instruction set in thesuperscalar core is combined with most variants integrating a dual16-bitmedia processor also in VLIW and vector architecture. Each processor core issuperpipelined as well as 4-unitsuperscalar.
A typicalintegrated circuit integrates asystem on a chip and further multiplies speed by integratingmultiple cores. Due to the very low power requirements it is a solution even for battery-powered applications.
The family started with the FR-500, includes FR-300, FR-400, FR-450, FR-550 and FR1000 architecture32-bit processors, can runLinux,RTLinux,VxWorks,eCos, orITRON and is also supported by the SoftuneIntegrated development environment and theGNU Compiler Collection[3][4] or GNUPro.
It is often used forimage processing orvideo processing with most variants including a dual16-bit media-processor.[5]
The 2005 presented FR1000 uses a core with 8-way 256-bitVLIW (MIMD) filling itssuperpipeline as well as a 4-unitsuperscalar architecture (integer (ALU)-,floating-point- and two media-processor-units), further increasing itspeak performance of each core to up to 28instructions per clock cycle. Like other VLIW-architectures 1 way is needed to load the next 256-bit instruction: 7-ways usable. Due to the used 4-waysingle instruction, multiple data (SIMD)vector processor-core, it counts to up to 112data-operations per cycle and core.[6] The included 4-way vector processor units are a32-bitintegerarithmetic logic unit andfloating point unit as well as a16-bit media-processor, which can process up to twice the operations in parallel.
The included integer- and floating-point unit enables the FR-V to execute complex tasks fully independent without need for help from acontrol unit; for example theNikon Expeed needs only a slowly clocked, quite simpleFujitsu FR controller as the main control unit for all included FR-V,DSP andGPU processors anddata communication and other modules. Some processors have integratedmemory management unit (MMU), allowing to runvirtualmultitaskingoperating systems (alsoreal-time operating systems) with hardwarememory protection.
They are used to build theMilbeautsignal processors specialized for image processing,[7][8] with the newest version additionally including an FR-V basedHD videoH.264 codec engine.[9][10]
The Milbeaut image engines are included in theLeica S2 andLeica M (Typ 240),[11]Nikon DSLRs (see Nikon Expeed), somePentax K mount[12] cameras and for theSigma True-II processor.[13]