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ETRAX CRIS

From Wikipedia, the free encyclopedia

TheETRAX CRIS is aRISCISA and series ofCPUs designed and manufactured byAxis Communications for use inembedded systems since 1993.[1] The name is anacronym of the chip's features:Ethernet, Token Ring, AXis - Code Reduced Instruction Set.Token Ring support has been taken out from the latest chips as it has become obsolete.

Types of chips

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The CGA-1 (Coax Gate Array) was the first microprocessor developed by Axis Communications. It containsIBM 3270 (coax) andIBM 5250 (Twinax) communications. The chip has amicrocontroller and various I/O's such as serial and parallel. The CGA-1 chip was designed by Martin Gren and Staffan Göransson.[2]

AnElphel Reconfigurable Network Camera based on ETRAX FS CPU and Xilinx Spartan 3e FPGA.
A FOX board LX 4+16 (4 MB flash and 16 MB SDRAM).

ETRAX

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  • In 1993, Axis developed the ETRAX-1Ethernet Controller, which has 10 Mbit/s Ethernet and Token Ring controllers.
  • In 1995, Axis introduced the ETRAX-4SoC which contains a Ethernet Controller, CPU, Memory Interface,SCSI controller, and parallel and serial I/O.[3]
  • In 1997, Axis introduced the ETRAX 100 SoC which features a 10/100 Mbit/s Ethernet Controller,ATA controller, andWide SCSI controller. The chip introduced on-chip unified instruction and datacache along withdirect memory access.[4]

ETRAX 100LX

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In 2000, Axis Introduced the ETRAX 100LX SoC which features aMMU,USB controller, andSDRAM interface. The CPU is capable of 100MIPS. The chip is able to run theLinux kernel without modifications except for low-level support.[5] The chip's maximumTDP is 0.35 Watts. As of Linux kernel 4.17, the architecture has been dropped due to being obsolete.[6]

Specifications:

  • 32-bitRISC CPU core
  • 10/100 Mbit/sEthernet controller
  • 4asynchronous serial ports
  • 2synchronous serial ports
  • 2 USB ports
  • 2 Parallel ports
  • 4 ATA (IDE) ports
  • 2 Narrow SCSI ports (or 1 Wide)
  • Support for SDRAM, Flash, EEPROM, SRAM

ETRAX 100LX MCM

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The ETRAX 100LX MCM is based on the ETRAX 100 LX. The chip has internal flash memory, SDRAM, and an EthernetPHYceiver. The Chip can come with 2 MB flash and 8 MB SDRAM or 4 MB flash and 16 MB SDRAM.

ETRAX FS

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Introduced in 2005 with full Linux 2.6 support, the chip features:

  • A 200MIPS 32-bitRISC CRIS CPU core with 16 kB instruction and datacache
  • 128 kB on-chip RAM
  • Two 10/100 Mbit/s Ethernet controllers
  • Crypto accelerator supportingAES,DES,Triple DES,SHA-1, andMD5
  • I/O processor supportingPC-Card,PCI, USB, SCSI and ATA

ARTPEC

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This section is an excerpt fromAxis Communications § Microprocessors.[edit]

The Axis Real-Time Picture Encoder Chip (ARTPEC) is a system on a chip (SoC) developed by Axis Communications.[7] There are currently nine generations of the chip, all of which run AXIS OS, a modified version ofLinux designed forembedded devices. Not all products developed by Axis Communications use its custom chip. The chip is typically found in high-performance devices such as higher-end cameras, while lower-cost devices use SoCs fromAmbarella.[8]

List of SoCs Developed
Release yearNameCPUFeatures
1999ARTPEC-1ETRAX CRIS
2003ARTPEC-2ETRAX CRIS
2007ARTPEC-3ETRAX CRIS
  • Hardware acceleratedH.264 video encoding
  • Capable of capturing1080P video at 30 frames per second
2011ARTPEC-4Multi-threadedMIPS CPU(34Kc)[9]
  • Implements Lightfinder, a technology that allows a camera to see color in low light or challenging light conditions
2013ARTPEC-5Dual-core MIPS CPU(1004Kf)
  • Implements Forensic Capture, aHigh Dynamic Range technology that increases forensic details in a scene
  • Implements Video encoders that utilize a technology called Zipstream to reduce bandwidth while maintaining video quality and detail
2017ARTPEC-6ARM Cortex-A9
  • Can runvideo analytics capable of identifying objects such as humans and cars
  • Capable of capturing4K video at 30 frames per second
2019ARTPEC-7ARM Cortex-A9
  • Implements amachine learning processor[10]
  • Hardware acceleratedH.265 video encoding
  • Implements secure boot, which prevents booting of unauthorized firmware
  • Improves low-light imaging via a technology called Lightfinder 2.0
2021ARTPEC-8ARM Cortex-A53
  • Implements adeep learning processor[11]
  • Can run video analytics that recognize various object characteristics such as clothing
2024ARTPEC-9ARM Cortex-A55
  • Hardware acceleratedAV1 video encoding
  • Faster deep learning processor capable of identifying more object characteristics

References

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  1. ^axis.com - Axis Chip Development HistoryArchived May 30, 2010, at theWayback Machine
  2. ^"30 years of milestones"(PDF).Axis Communications.
  3. ^Zander, Per."Axis Communications - A World Of Intelligent Networks"(PDF).
  4. ^"ETRAX 100: technical specifications". 1999-01-01. Archived fromthe original on 2000-10-17.
  5. ^The linux kernel source-code under /arch/cris contained the low-level CPU-specific additions required to make the Linux kernel able to run on the ETRAX/Cris CPUs. (See for examplehttps://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/cris?h=v4.13-rc4)
  6. ^"Linux-Kernel Archive: [PATCH 00/16] remove eight obsolete architectures".
  7. ^Viklund, Lars."Introduction to Hardware Verification"(PDF).
  8. ^ipvideomarket (2019-08-30)."How To See If Your Camera Uses Huawei Hisilicon Chips".IPVM. Retrieved2022-07-23.
  9. ^"Axis uses MIPS32 34Kc processor in video cameras".automation.com. Retrieved2023-09-22.
  10. ^Jakobsson, Anton."Distributing a Neural Network on Axis Cameras".
  11. ^"StackPath".www.securityinfowatch.com. 27 September 2021. Retrieved2022-06-08.

External links

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