 | This articlemay containoriginal research. Pleaseimprove it byverifying the claims made and addinginline citations. Statements consisting only of original research should be removed.(November 2010) (Learn how and when to remove this message) |
 | |
| Company type | Private |
|---|---|
| Industry | Supercomputers |
| Founded | 1982; 44 years ago (1982) inRichardson, Texas |
| Founder |
|
| Defunct | 1995 (1995) |
| Fate | Acquired byHewlett-Packard |
Convex Computer Corporation was a company that developed, manufactured and marketedvectorminisupercomputers andsupercomputers for small-to-medium-sized businesses. Their laterExemplar series ofparallel computing machines were based on theHewlett-Packard (HP)PA-RISCmicroprocessors, and in 1995, HP bought the company. Exemplar machines were offered for sale by HP for some time, and Exemplar technology was used in HP'sV-Class machines.
Convex was formed in 1982 by Bob Paluck andSteve Wallach inRichardson, Texas. It was originally namedParsec and early prototype and production boards bear that name. They planned on producing a machine very similar in architecture to theCray Researchvector processor machines, with a somewhat lower performance, but with a much betterprice–performance ratio. In order to lower costs, the Convex designs were not as technologically aggressive as Cray's, and were based on more mainstream chip technology, attempting to make up for the loss in performance in other ways.
_-_Computer_History_Museum_(2007-11-10_22.58.44_by_Carlo_Nardone).jpg)
Their first machine was theC1, released in 1985. The C1 was very similar to theCray-1 in general design, but itsCPU and main memory was implemented with slower but less expensiveCMOS technology. They offset this by increasing the capabilities of the vector units, including doubling the vector registers' length to 12864-bit elements each.[1] It also usedvirtual memory as opposed to the static memory system of the Cray machines, which improved programming. It was generally rated at 20MFLOPS peak for double precision (64-bit), and 40 MFLOPS peak for single precision (32-bit), about one fifth the normal speed of the Cray-1. They also invested heavily in advanced automatic vectorizingcompilers in order to gain performance when existing programs were ported to their systems. The machines ran aBSD version ofUnix known initially asConvex Unix then later asConvexOS due to trademark and licensing issues. ConvexOS has DECVMS compatibility features, known by the product name of COVUE (CONVEX-to-VAX User Environment),[2] as well as Cray Fortran features. Their Fortran compiler went on to be licensed to other computers such asArdent Computer and Stellar (and merged Stardent).
TheC2 was a crossbar-interconnectedmultiprocessor version of the C1, with up to four CPUs, released in 1988. It used newer 20,000-gate CMOS and 10,000-gateemitter-coupled logic (ECL) gate arrays for a boost in clock speed from 10 MHz to 25 MHz, and rated at 50 MFLOPS peak for double precision per CPU (100 MFLOPS peak for single precision). It was Convex's most successful product.
TheC2 was followed by theC3 in 1991, being essentially similar to the C2 but with a faster clock and support for up to eight CPUs implemented with low-density GaAs FPGAs.[3] Various configurations of the C3 were offered, with 50 to 240 MFLOPS per CPU. However, the C3 and the Convex business model were overtaken by changes in the computer industry. The arrival ofRISC microprocessors meant that it was no longer possible to develop cost-effective high-performance computing as a standalone small low-volume company. While the C3 was delivered late, which resulted in lost sales, it was still not going to be able to compete with commodity high-performance computing in the long run.
Another speed boost used in theC3 andC4, which moved the hardware implementation toGaAs-based chips, following an evolution identical to that of the Cray machines, but the effort was too little, too late. Some considered the whole C4 program to be nothing more than chasing a business in decline.[according to whom?] By this time, even though Convex was the first vendor to ship a GaAs based product, they were losing money.
In 1994, Convex introduced an entirely new design, known as theExemplar. Unlike the C-series vector computer, the Exemplar was a parallel-computing machine that used the HPPA-7100 processor in theSPP1000 series,[4] followed by HPPA-7200 microprocessors in theSPP1200 series,[5] connected together usingSCI. First dubbedMPP, these machines were later calledSPP[6] andExemplar and sold under theSPP-1600 moniker. The expectation was that a software programming model for parallel computing could draw in customers. But the type of customers Convex attracted believed inFortran and brute force rather than sophisticated technology. The operating system also had terrible performance problems which could not easily be fixed. Eventually, Convex established a working partnership with HP's hardware and software divisions. Initially it was intended that the Exemplar would bebinary-compatible with HP'sHP-UX operating system but eventually it was decided to port HP-UX to the platform and sell the platform as standalone servers.
In 1995, Hewlett-Packard bought Convex.[7] HP sold Convex Exemplar machines under theS-Class (MP) andX-Class (CC-NUMA) titles, and later incorporated some of Exemplar's technology into theV-Class machine, which was released running the HP-UX 11.0 release instead of the SPP-UX version which was sold with the S- and X-Class products.[8]
The processor architecture of the C-series models is broadly similar across the entire range. Machine instructions can be 16, 32, 48 or 64 bits in length, situated on half-word (two-byte) boundaries. Standard instructions are one to three half-words, with extended instructions prefixed with an extra half-word value, being of two to four half-words in total length.[9]: 9
Three general-purpose register sets are provided, these providing eight address, eight scalar, and eight vector accumulator registers respectively, with each set expanded in the C4600 series to 32 address, 28 scalar, and 16 vector accumulator registers respectively. A number of special-purpose vector, scalar stride, and control registers are also provided, exposing the program counter and processor status word.[9]: 49–67
| ||||||||||||||||||||||
| Products |
|   | ||||||||||||||||||||
| CEOs |
| |||||||||||||||||||||
| Assets | ||||||||||||||||||||||
| Acquisitions |
| |||||||||||||||||||||
| Spin-offs | ||||||||||||||||||||||
| Related | ||||||||||||||||||||||
| ||||||||||||||||||||||
