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1 nm process

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Semiconductor manufacturing process

Semiconductor device fabrication

MOSFET scaling (process nodes)
20 μm – 1968 10 μm – 1971 6 μm – 1974 3 μm – 1977 1.5 μm – 1981 1 μm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 90 nm – 2003 65 nm – 2005 45 nm – 2007 32 nm – 2009 28 nm – 2010 22 nm – 2012 14 nm – 2014 10 nm – 2016 7 nm – 2018 5 nm – 2020 3 nm – 2022
Future 2 nm ~ 2025 1 nm ~ 2027
Half-nodes Density CMOS Device (multi-gate) Moore's law Transistor count Semiconductor Industry Nanoelectronics
v t e

In semiconductor manufacturing, the "1 nm process" represents the next significant milestone inMOSFET (metal–oxide–semiconductor field-effect transistor) scaling, succeeding the"2 nm" process node. It continues the industry trend of miniaturization inintegrated circuit (IC) technology, which has been essential for improving performance, increasingtransistor density, and reducing power consumption.

The term "1 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by the Institute of Electrical and Electronics Engineers (IEEE), a "1 nm node range label" is expected to have a contacted gate pitch of 42nanometers and a tightest metal pitch of 16 nanometers. The first 1 nm chips are expected to be launched in 2027.^[1]

History

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In 2008, transistors oneatom thick and ten atoms wide were made by UK researchers. They were carved fromgraphene, predicted by some to one day oust silicon as the basis of future computing. Graphene is a material made from flat sheets of carbon in a honeycomb arrangement, and is a leading contender. A team at theUniversity of Manchester, UK, used it to make some of the smallest transistors ever: devices only 1 nm across that contain just a few carbon rings.^[2]

In 2016, researchers atLawrence Berkeley National Laboratory created a transistor with a working 1-nanometer gate.^[3]^[4] The field-effect transistor usedMoS₂ as the channel material, while acarbon nanotube was used to invert the channel. The effective channel length is approximately 1 nm. However, the drain to source pitch was much bigger, withmicrometre size.

Research and technology demos

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In 2012 a single atom transistor was fabricated using aphosphorus atom bound to a silicon surface (between two significantly larger electrodes). This transistor could be said to be a 180 pm transistor (theVan der Waals radius of a phosphorus atom); though itscovalent radius bound to silicon is likely smaller.^[5] Making transistors smaller than this will require either using elements with smaller atomic radii, or using subatomic particles—likeelectrons orprotons—as functional transistors.

In 2018, researchers atKarlsruhe Institute of Technology created a transistor with a working single atom gate.^[6]

In July 2024, a team led by Director Jo Moon-Ho at the Center for Van der Waals Quantum Solids within theInstitute for Basic Science (IBS) in Korea developed a method for the epitaxial growth of one-dimensional (1D) metallic materials with widths under 1 nm on siliconsubstrates. This process was used to construct a new structure for two-dimensional (2D) semiconductor logic circuits, employing these 1D metals as gate electrodes. TheInternational Roadmap for Devices and Systems (IRDS) by the IEEE projects that semiconductor node technology may reach around 0.5 nm by 2037, with transistor gate lengths of approximately 12 nm. However, the IBS research team demonstrated that the channel width modulated by the electric field from the 1D MTB gate could be as small as 3.9 nm, surpassing these projections.^[7]

In April 2025, a team atFudan University led by professors Wenzhong Bao and Peng Zhou announced that they had successfully created a 1nmRISC-V chip usingtwo-dimensional semiconductors.^[8]^[9]