 8 MHz V20 in plastic DIP package | |
| General information | |
|---|---|
| Launched | November 1982; 43 years ago (1982-11)[1] |
| Common manufacturers | |
| Performance | |
| Data width | 16 bits |
| Physical specifications | |
| Transistors |
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| Cores |
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| Co-processor |
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| History | |
| Successor | NEC V60 |
TheNEC V20 is amicroprocessor that was designed and produced byNEC. It is bothpin compatible andobject-code compatible with theIntel 8088, with aninstruction set architecture (ISA) similar to that of theIntel 80188 with some extensions.[2] The V20 was introduced in November 1982.[1][2]
The V20'sdie comprised 63,000transistors; more than double the 29,000 of the 8088 CPU.[3] The chip was designed for a clockduty cycle of 50%, compared to the 33% duty cycle used by the 8088.[4] The V20 has two 16-bit wide internal databuses, allowing two data transfers to occur concurrently.[5] Differences like that meant that a V20 could typically complete more instructions in a given time than an Intel 8088 running at the same frequency.[2]
The V20 was fabricated in 2-micron CMOS technology.[6][4] Early versions ran at speeds of 5, 8, and 10 MHz.[7]: 2 In 1990, an upgrade to the fabrication process technology resulted in the V20H and V20HL, with improved performance and reduced power consumption.[6] Later versions added speeds of 12 and 16 MHz. The V20HLs were also completely static, allowing their clock to be stopped.
The V20 was described as16-bits wide internally. It used an 8-bit external data bus that was multiplexed onto the same pins as the low byte of the address bus. Its 20-bit wide address bus was able to address 1 MB of memory.
The V20 was reported to have been compatible with the Intel 8087floating-point unit (FPU) coprocessor.[8] NEC also designed their own FPU, theμPD72091 [jp], which was cancelled before reaching production. They followed this with a revised design, the μPD72191, but it is unclear how many, if any, of this second part were produced.[9]
The V30, a nearly identical CPU with a 16-bit wide external data bus, debuted on September 1, 1983.[10][6] It was pin and object-code compatible with theIntel 8086.
The V20's ISA includes several instructions not executed by the 8088, with instructions for bit manipulation, packed BCD operations, multiplication, and division. They also include new real-mode instructions from the Intel 80286.[11]
TheADD4S,SUB4S, andCMP4S instructions were able to add, subtract, and compare huge packedbinary-coded decimal numbers stored in memory. InstructionsROL4 andROR4 rotate four-bitnibbles. Another family consisted of theTEST1,SET1,CLR1, andNOT1 instructions, which test, set, clear, and invert single bits of their operands, but are far less efficient than the lateri80386 equivalentsBT,BTS,BTR, andBTC; neither are their encodings compatible. There were two instructions to extract and insert bit fields of arbitrary lengths (EXT,INS). And finally, there were two additional repeat prefixes,REPC andREPNC, which amended the originalREPE andREPNE instructions for scanning a string of bytes or words (with instructionsSCAS andCMPS) while a less or not less condition remained true.[12]
The V20 offered a mode that emulated anIntel 8080 CPU. ABRKEM instruction is issued to start 8080 emulation. The operand of the instruction specifies an interrupt number whose vector contains the segment:offset where emulation is to begin. To end, aRETEM instruction is issued in 8080 code. One feature not often employed is theCALLN (call native) which issues an 8086-type interrupt call that enables x86 code (which returns using anIRET) to be mixed in with 8080 code.
Another mode put the processor into a power-saving state via aHALT instruction.[7][8]
In 1982, Intel sued NEC over the latter's μPD8086 and μPD8088. This suit was settled out of court, with NEC agreeing to license the designs from Intel.[13]
In late 1984, Intel again filed suit against NEC, claiming that the microcode in the V20 and V30 infringed its patents for the 8088 and 8086 processors.[14] NEC software engineer Hiroaki Kaneko had studied both the hardware design of the Intel CPUs and the original Intel microcode.
In its ruling, on September 22, 1986,[15] the court determined that the microcode in the control store constitutes a computer program, and so is protected by copyright.[16] They further found Intel to have forfeited their copyright by neglecting to ensure that all second-source chips were suitably marked. The court also determined that NEC did not simply copy Intel's microcode, and that the microcode in the V20 and V30 was sufficiently different from Intel's to not infringe Intel's copyright.
The judge in the case accepted NEC'scleanroom evidence. He also approved of NEC's use ofreverse engineering with respect to the creation of NEC's Rev.2 microcode, without commenting on it with respect to the Rev.0 code.[16]: 212–221
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| Product | Part no. | Details |
|---|---|---|
| NEC V30 | μPD70116 | Essentially an NEC V20 with a 16-bit external data bus, the V30 was pin compatible with theIntel 8086. The V30 was a factory upgrade from the 8086 used in theGTD-5 EAX Class 5 central office switch. It was also used in thePsion Series 3, theNEC PC-9801VM, theOlivetti PCS86, theApplied Engineering "PC Transporter" card for theApple II series of computers, and in various arcade machines (particularly ones made byIrem) in the late 1980s. Years later, a low-voltage V30 MZ version was used inBandai's handheldWonderSwan game console. |
| NEC V20HL | μPD70108H | High-speed (up to 16 MHz), low-power version of the V20. |
| NEC V30HL | μPD70116H | High-speed (up to 16 MHz), low-power version of the V30. |
| NEC V25 | μPD70320 | Amicrocontroller version of the NEC V20, adding on-chip peripherals such as an interrupt controller, a DMA engine, two timers, two UARTs, analog comparators, and general-purpose I/O pins. The μPD70322 variant includes a 16 KByte on-chip mask ROM that is not present in the μPD70320. |
| μPD70322 | ||
| NEC V25HS | μPD79011 | A version of the V25 with theRX116 RTOS in the internal ROM. |
| N/a | μPD70P322 | A microcontroller that can be configured to act as either a NEC V25 or a NEC V35, controlled by an input pin "V25/V35". Includes a 16 KByte reprogrammable UVEPROM.[17] |
| NEC V25+ | μPD70325 | High-speed version of the V25. |
| NEC V25 Security Guard | μPD70327 | A version of the NEC V25 that adds "Security Guard", a security mode where instruction opcode bytes are translated during fetch/decode using a 256-entry user-defined lookup table stored in an on-chipMask ROM, allowing it to execute code encrypted with an 8-bitSubstitution cipher. This security mode can be enabled/disabled at runtime with the "Security Guard"-specific instructionsBRKS andBRKN.[17] |
| NEC V33 | μPD70136 | A version of the V30 with separate address and data buses and with instruction decode done by hardwired logic rather than a microprogrammed control store. Throughput is twice as high as a V30 for the same clock frequency. The V33 has performance equivalent toIntel 80286. Memory address space is increased to 16M bytes. Two additional instructions,BRKXA andRETXA, support the extended addressing mode. 8080 emulation is not supported. |
| NEC V33A | μPD70136A | Differs from the V33 in that it has interrupt vector numbers compatible with Intel's 80X86 processors. (The "undefined instruction trap" was moved from vector 122 to vector 6, and "coprocessor not present" was moved from vector 130 to vector 7.[17][18]) |
| NEC V35 | μPD70330 | A microcontroller version of the NEC V30. The μPD70332 variant includes a 16 KByte on-chip mask ROM that is not present in the μPD70330. |
| μPD70332 | ||
| NEC V35HS | μPD79021 | A version of the V35 with the RX116 RTOS in the internal ROM. |
| NEC V35+ | μPD70335 | A high-speed version of the V35. |
| NEC V35 Security Guard | μPD70337 | A version of the V35 that adds "Security Guard", similar to μPD70327. |
| NEC V40 | μPD70208 | An embedded version of the V20, integrated Intel-compatible8251USART,8253 programmable interval timer, and8255 parallel port interface. Used in the Olivetti Prodest PC1, Olivetti M200, Olivetti ETV 2700, Olivetti ETV 2900, Olivetti VM 2000, Digisystems Jetta XD, theSharp PC-4500 and theZenith Eazy PC. |
| NEC V40HL | μPD70208H | A high-speed, low-voltage version of the V40. |
| NEC V50 | μPD70216 | An embedded version of the V30. It is the main CPU in theAkai S1000 and S1100, and theKorg M1.[19][20] |
| NEC V50HL | μPD70216H | A high-speed, low-voltage version of the V50. |
| NEC V41 | μPD70270 | Integrates a V30HL core andPC-XT peripherals:8255 parallel port interface,8254 programmable interval timer,8259 PIC,8237DMA controller and8042 keyboard controller. Also integrates full DRAM controller. |
| NEC V51 | μPD70280 | Integrates a V30HL core andPC-XT peripherals:8255 parallel port interface,8254 programmable interval timer,8259 PIC,8237 DMA controller and8042 keyboard controller. Also integrates full DRAM controller. Was used in theOlivetti Quaderno PT-XT-20. |
| NEC V53 | μPD70236 | Integrates a V33 core with 4-channel DMA (μPD71071[21]/i8237),UART (μPD71051/i8251), three timer/counters (μPD71054/i8254) andinterrupt controller (μPD71059/i8259). It was used in theAkai MPC3000[22][23] andAkai SG01v. |
| NEC V53A | μPD70236A | Integrates some peripherals with a V33A core. Used inSharp Zaurus PI-B304/B308 |
| NECV55PI [jp] | μPD70433 | The V55PI has extended segment registers called DS2 and DS3, and by shifting the register value by 8 bits to the left and adding an offset value, it is possible to access the entire 16MB address space.[24] |
| NEC V55SC | μPD70423 | The V55SC not only comes with extended segment registers, called DS2 and DS3, but is also furnished with a two-channel Multi Protocol Serial Controller (MPSC) which is subset of μPD72001/72002.[25] |
| Vadem VG230 | A single-chip PC platform.[26] The VG230 contained a 16 MHz NEC V30HL processor and IBM PC/XT-compatible core logic, LCD controller (CGA/AT&T640x400) with touch-plane support, keyboard matrix scanner, dualPCMCIA 2.1 card controller,EMS 4.0 hardware support for up to 64 MB, and built-in timer, PIC, DMA, UART and RTC controllers. It was used in theHP OmniGo 100,120 andIBM Simon.[27] | |
| Vadem VG330 | Successor to the VG230, it contained a 32 MHz NEC V30MX processor and IBM PC/AT-compatible core logic with dual PICs, LCD controller (640x480), keyboard matrix scanner,PC Card ExCA 2.1 controller and SIR port. | |
| NEC V60 | μPD70616 | With the V60 processor, NEC departed from the x86 design and launched a new, 32-bitCISC architecture. The V60 and the V70, which differed mainly in the widths of their respective external address and data busses, both included a V20/V30 emulation mode.[28]: §10 [9] (The later V80, which used the same CISC architecture, did not include the V20/V30 emulation mode.)[29] |
| NEC V70 | μPD70632 |
https://phonedb.net/index.php?m=processor&id=87&c=nec_v20_upd70108 was invoked but never defined (see thehelp page).| Divisions and subsidiaries |
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