 | This articlerelies largely or entirely on asingle source. Relevant discussion may be found on thetalk page. Please helpimprove this article byintroducing citations to additional sources. Find sources: "Master-checker" – news ·newspapers ·books ·scholar ·JSTOR(November 2024) |
Master-checker ormaster/checker is a hardware-supportedfault tolerance architecture formultiprocessor systems, in which two processors, referred to as themaster andchecker, calculate the same functions in parallel in order to increase the probability that the result is exact. The checkerCPU is synchronised at clock level with the master CPU and processes the same programs as the master. Whenever the master CPU generates an output, the checker CPU compares this output to its own calculation and in the event of a difference raises a warning.[1]
The master-checker system generally gives more accurate answers by ensuring that the answer is correct before passing it on to the application requesting the algorithm being completed. It also allows for error handling if the results are inconsistent.[1] A recurrence of discrepancies between the two processors could indicate a flaw in the software, hardware problems, or timing issues between the clock, CPUs, and/or system memory. However, such redundant processing wastes time and energy. If the master-CPU is correct 95% or more of the time, the power and time used by the checker-CPU to verify answers is wasted. Depending on the merit of a correct answer, a checker-CPU may or may not be warranted. In order to alleviate some of the cost in these situations, the checker-CPU may be used to calculate something else in the same algorithm, increasing the speed and processing output of the CPU system.[citation needed]
 | Thismicrocomputer- ormicroprocessor-related article is astub. You can help Wikipedia byadding missing information. |