Acontrol store is the part of aCPU'scontrol unit that stores the CPU'smicroprogram. It is usually accessed by amicrosequencer. A control store implementation whose contents are unalterable is known as aread-only memory (ROM) or Read Only Storage (ROS); one whose contents are alterable is known as a Writable Control Store (WCS).
Early control stores were implemented as a diode-array accessed via address decoders, a form of read-only memory. This tradition dates back to theprogram timing matrix on theMIT Whirlwind, first described in 1947. ModernVLSI processors instead use matrices offield-effect transistors to build theROM and/orPLA structures used to control the processor as well as its internal sequencer in amicrocoded implementation.IBM System/360 used a variety of techniques:CCROS (Card Capacitor Read-Only Storage) on theModel 30,TROS (Transformer Read-Only Storage) on theModel 40, andBCROS (Balanced Capacitor Read-Only Storage) on Models50,65 and67.
Some computers are built using "writable microcode" — rather than storing the microcode in ROM or hard-wired logic, the microcode is stored in a RAM called awritable control store orWCS. Such a computer is sometimes called aWritable Instruction Set Computer orWISC.[1] Many of these machines were experimental laboratory prototypes, such as the WISC CPU/16[2] and the RTX 32P.[3]
The originalSystem/360 models have read-only control store, but later System/360,System/370 and successor models load part or all of their microprograms from floppy disks or otherDASD into a writable control store consisting of ultra-high speedrandom-accessread–write memory. The System/370 architecture includes a facility calledInitial-Microprogram Load (IML orIMPL)[4] that can be invoked from the console, as part ofPower On Reset (POR) or from another processor in atightly coupledmultiprocessor complex. This permitted IBM to easily repair microprogramming defects in the field. Even when the majority of the control store is stored in ROM, computer vendors would often sell writable control store as an option, allowing the customers to customize the machine's microprogram. Other vendors, e.g., IBM, use the WCS to run microcode for emulator features[5][6] and hardware diagnostics.[7]
Other commercial machines that use writable microcode include theBurroughs Small Systems (1970s and 1980s), the Xerox processors in theirLisp machines andXerox Star workstations, theDECVAX 8800 ("Nautilus") family, and theSymbolics L- and G-machines (1980s). Some DECPDP-10 machines store their microcode in SRAM chips (about 80 bits wide x 2 Kwords), which is typically loaded on power-on through some other front-end CPU.[8] Many more machines offer user-programmable writable control stores as an option (including theHP 2100, DECPDP-11/60 andVarian Data Machines V-70 seriesminicomputers).TheMentec M11 andMentec M1 store its microcode in SRAM chips, loaded on power-on through another CPU.TheData General Eclipse MV/8000 ("Eagle") has a SRAM writable control store, loaded on power-on through another CPU.[9]
WCS offers several advantages including the ease of patching the microprogram and, for certain hardware generations, faster access than ROMs could provide. User-programmable WCS allow the user to optimize the machine for specific purposes. However, it also had the disadvantage of making it harder to debug programs, and making it possible for malicious users to negatively affect the system and data.[10]
TheBurroughs Small Systems, theRekursiv processor, and theImsysCjip[11] supported loading different microcode for programs in different programming languages, with the microcode for a particular language implementing an instruction set tailored for the language.
Several Intel CPUs in thex86 architecture family have writable microcode,[12] starting with thePentium Pro in 1995.[13][14]This has allowed bugs in theIntel Core 2 microcode and IntelXeon microcode to be fixed in software, rather than requiring the entire chip to be replaced.Such fixes can be installed by Linux,[15]FreeBSD,[16] Microsoft Windows,[17] or the motherboard BIOS.[18]
The control store usually has a register on its outputs. The outputs that go back into the sequencer to determine the next address have to go through some sort of register to prevent the creation of arace condition.[19]In most designs all of the other bits also go through a register. This is because the machine will work faster if the execution of the next microinstruction is delayed by one cycle. This register is known as a pipeline register. Very often the execution of the next microinstruction is dependent on the result of the current microinstruction, which will not be stable until the end of the current microcycle. It can be seen that either way, all of the outputs of the control store go into one big register. Historically it used to be possible to buy EPROMs with these register bits on the same chip.
Theclock signal determining theclock rate, which is the cycle time of the system, primarily clocks this register.
4096 x 75-bit SRAM writeable control store: 74-bit microinstruction with 1 parity bit (18 fields)
It is not unusual to find microprograms that are greater than 50K bytes in size. This increase in size, and the expansion of microprograming beyond the traditional bounds of machine instruction emulation, have increased the possibility of both malicious and faulty microprograms, particularly the later.
