SPI wiring modes¶

ad738x ADCs can output data on several SDO lines (1/2/4). The driver currentlysupports only 1 SDO line.

Reference voltage¶

Oversampling and resolution boost¶

This family supports 2 types of oversampling: normal average and rollingaverage. Only normal average is supported by the driver, as rolling average canbe achieved by processing a captured data buffer. The following ratios areavailable: 1 (oversampling disabled)/2/4/8/16/32.

When the on-chip oversampling function is enabled the performance of the ADC canexceed the default resolution. To accommodate the performance boost achievable,it is possible to enable an additional two bits of resolution. Because theresolution boost feature can only be enabled when oversampling is enabled andoversampling is not as useful without the resolution boost, the driverautomatically enables the resolution boost if and only if oversampling isenabled.

Since the resolution boost feature causes 16-bit chips to now have 18-bit datawhich means the storagebits has to change from 16 to 32 bits, we use the newext_scan_type feature to allow changing the scan_type at runtime. Unfortunatelylibiio does not support it. So when enabling or disabling oversampling, usermust restart iiod using the following command:

root:~#systemctlrestartiiod

Alert¶

2 channels variants of the ad738x family, can use the SDOB line as an alert pinwhen configured in 1 SDO line mode. 4 channels variants, can use SDOD as analert pin when configured in 1 or 2 SDO line(s) mode, although only 1 SDO linemode is currently supported by the driver (seeSPI wiring modes).

At the end of a conversion the active-low alert pin gets asserted if theconversion result exceeds the alert high limit or falls below the alert lowlimit. It is cleared, on a falling edge of CS. The alert pin is common to allchannels.

User can enable alert using the regular iio events attribute:

events/thresh_either_en

The high and low thresholds are common to all channels and can also be set usingregular iio events attributes:

events/in_thresh_falling_valueevents/in_thresh_rising_value

If debugfs is available, user can read the ALERT register to determine thefaulty channel and direction.

In most use cases, user will hardwire the alert pin to trigger a shutdown.

Channel selection and sequencer (single-end chips only)¶

Single-ended chips of this family (ad7386/7/8(-4)) have a 2:1 multiplexer infront of each ADC. They also include additional configuration registers thatallow for either manual selection or automatic switching (sequencer mode), ofthe multiplexer inputs.

From an IIO point of view, all inputs are exported, i.e ad7386/7/8export 4 channels and ad7386-4/7-4/8-4 export 8 channels.

InputsAinX0 of multiplexers correspond to the first half of IIO channels (i.e0-1 or 0-3) and inputsAinX1 correspond to second half (i.e 2-3 or 4-7).Example for AD7386/7/8 (2 channels parts):

   IIO   | AD7386/7/8         |         +----------------------------         |         |     _____        ______         |         |    |     |      |      |voltage0 | AinA0 --|--->|     |      |      |         |         |    | mux |----->| ADCA |---voltage2 | AinA1 --|--->|     |      |      |         |         |    |_____|      |_____ |         |         |     _____        ______         |         |    |     |      |      |voltage1 | AinB0 --|--->|     |      |      |         |         |    | mux |----->| ADCB |---voltage3 | AinB1 --|--->|     |      |      |         |         |    |_____|      |______|         |         |         |         +----------------------------

When enabling sequencer mode, the effective sampling rate is divided by two.

Unimplemented features¶

• 2/4 SDO lines

• Rolling average oversampling

• Power down mode

• CRC indication