Concepts¶

Modern processors are generally able to enter states in which the execution ofa program is suspended and instructions belonging to it are not fetched frommemory or executed. Those states are theidle states of the processor.

Since part of the processor hardware is not used in idle states, entering themgenerally allows power drawn by the processor to be reduced and, in consequence,it is an opportunity to save energy.

CPU idle time management is an energy-efficiency feature concerned about usingthe idle states of processors for this purpose.

The Idle Loop¶

The idle loop code takes two major steps in every iteration of it. First, itcalls into a code module referred to as thegovernor that belongs to the CPUidle time management subsystem calledCPUIdle to select an idle state forthe CPU to ask the hardware to enter. Second, it invokes another code modulefrom theCPUIdle subsystem, called thedriver, to actually ask theprocessor hardware to enter the idle state selected by the governor.

The role of the governor is to find an idle state most suitable for theconditions at hand. For this purpose, idle states that the hardware can beasked to enter by logical CPUs are represented in an abstract way independent ofthe platform or the processor architecture and organized in a one-dimensional(linear) array. That array has to be prepared and supplied by theCPUIdledriver matching the platform the kernel is running on at the initializationtime. This allowsCPUIdle governors to be independent of the underlyinghardware and to work with any platforms that the Linux kernel can run on.

Each idle state present in that array is characterized by two parameters to betaken into account by the governor, thetarget residency and the (worst-case)exit latency. The target residency is the minimum time the hardware mustspend in the given state, including the time needed to enter it (which may besubstantial), in order to save more energy than it would save by entering one ofthe shallower idle states instead. [The “depth” of an idle state roughlycorresponds to the power drawn by the processor in that state.] The exitlatency, in turn, is the maximum time it will take a CPU asking the processorhardware to enter an idle state to start executing the first instruction after awakeup from that state. Note that in general the exit latency also must coverthe time needed to enter the given state in case the wakeup occurs when thehardware is entering it and it must be entered completely to be exited in anordered manner.

There are two types of information that can influence the governor’s decisions.First of all, the governor knows the time until the closest timer event. Thattime is known exactly, because the kernel programs timers and it knows exactlywhen they will trigger, and it is the maximum time the hardware that the givenCPU depends on can spend in an idle state, including the time necessary to enterand exit it. However, the CPU may be woken up by a non-timer event at any time(in particular, before the closest timer triggers) and it generally is not knownwhen that may happen. The governor can only see how much time the CPU actuallywas idle after it has been woken up (that time will be referred to as theidleduration from now on) and it can use that information somehow along with thetime until the closest timer to estimate the idle duration in future. How thegovernor uses that information depends on what algorithm is implemented by itand that is the primary reason for having more than one governor in theCPUIdle subsystem.

There are fourCPUIdle governors available,menu,TEO,ladder andhaltpoll. Which of them is used by default depends on theconfiguration of the kernel and in particular on whether or not the schedulertick can bestopped by the idle loop. Availablegovernors can be read from theavailable_governors, and the governorcan be changed at runtime. The name of theCPUIdle governor currentlyused by the kernel can be read from thecurrent_governor_ro orcurrent_governor file under/sys/devices/system/cpu/cpuidle/insysfs.

WhichCPUIdle driver is used, on the other hand, usually depends on theplatform the kernel is running on, but there are platforms with more than onematching driver. For example, there are two drivers that can work with themajority of Intel platforms,intel_idle andacpi_idle, one withhardcoded idle states information and the other able to read that informationfrom the system’s ACPI tables, respectively. Still, even in those cases, thedriver chosen at the system initialization time cannot be replaced later, so thedecision on which one of them to use has to be made early (on Intel platformstheacpi_idle driver will be used ifintel_idle is disabled for somereason or if it does not recognize the processor). The name of theCPUIdledriver currently used by the kernel can be read from thecurrent_driverfile under/sys/devices/system/cpu/cpuidle/ insysfs.

Idle CPUs and The Scheduler Tick¶

The scheduler tick is a timer that triggers periodically in order to implementthe time sharing strategy of the CPU scheduler. Of course, if there aremultiple runnable tasks assigned to one CPU at the same time, the only way toallow them to make reasonable progress in a given time frame is to make themshare the available CPU time. Namely, in rough approximation, each task isgiven a slice of the CPU time to run its code, subject to the scheduling class,prioritization and so on and when that time slice is used up, the CPU should beswitched over to running (the code of) another task. The currently running taskmay not want to give the CPU away voluntarily, however, and the scheduler tickis there to make the switch happen regardless. That is not the only role of thetick, but it is the primary reason for using it.

The scheduler tick is problematic from the CPU idle time management perspective,because it triggers periodically and relatively often (depending on the kernelconfiguration, the length of the tick period is between 1 ms and 10 ms).Thus, if the tick is allowed to trigger on idle CPUs, it will not make sensefor them to ask the hardware to enter idle states with target residencies abovethe tick period length. Moreover, in that case the idle duration of any CPUwill never exceed the tick period length and the energy used for entering andexiting idle states due to the tick wakeups on idle CPUs will be wasted.

Fortunately, it is not really necessary to allow the tick to trigger on idleCPUs, because (by definition) they have no tasks to run except for the special“idle” one. In other words, from the CPU scheduler perspective, the only userof the CPU time on them is the idle loop. Since the time of an idle CPU neednot be shared between multiple runnable tasks, the primary reason for using thetick goes away if the given CPU is idle. Consequently, it is possible to stopthe scheduler tick entirely on idle CPUs in principle, even though that may notalways be worth the effort.

Whether or not it makes sense to stop the scheduler tick in the idle loopdepends on what is expected by the governor. First, if there is another(non-tick) timer due to trigger within the tick range, stopping the tick clearlywould be a waste of time, even though the timer hardware may not need to bereprogrammed in that case. Second, if the governor is expecting a non-timerwakeup within the tick range, stopping the tick is not necessary and it may evenbe harmful. Namely, in that case the governor will select an idle state withthe target residency within the time until the expected wakeup, so that state isgoing to be relatively shallow. The governor really cannot select a deep idlestate then, as that would contradict its own expectation of a wakeup in shortorder. Now, if the wakeup really occurs shortly, stopping the tick would be awaste of time and in this case the timer hardware would need to be reprogrammed,which is expensive. On the other hand, if the tick is stopped and the wakeupdoes not occur any time soon, the hardware may spend indefinite amount of timein the shallow idle state selected by the governor, which will be a waste ofenergy. Hence, if the governor is expecting a wakeup of any kind within thetick range, it is better to allow the tick trigger. Otherwise, however, thegovernor will select a relatively deep idle state, so the tick should be stoppedso that it does not wake up the CPU too early.

In any case, the governor knows what it is expecting and the decision on whetheror not to stop the scheduler tick belongs to it. Still, if the tick has beenstopped already (in one of the previous iterations of the loop), it is betterto leave it as is and the governor needs to take that into account.

The kernel can be configured to disable stopping the scheduler tick in the idleloop altogether. That can be done through the build-time configuration of it(by unsetting theCONFIG_NO_HZ_IDLE configuration option) or by passingnohz=off to it in the command line. In both cases, as the stopping of thescheduler tick is disabled, the governor’s decisions regarding it are simplyignored by the idle loop code and the tick is never stopped.

The systems that run kernels configured to allow the scheduler tick to bestopped on idle CPUs are referred to astickless systems and they aregenerally regarded as more energy-efficient than the systems running kernels inwhich the tick cannot be stopped. If the given system is tickless, it will usethemenu governor by default and if it is not tickless, the defaultCPUIdle governor on it will beladder.

Themenu Governor¶

Themenu governor is the defaultCPUIdle governor for tickless systems.It is quite complex, but the basic principle of its design is straightforward.Namely, when invoked to select an idle state for a CPU (i.e. an idle state thatthe CPU will ask the processor hardware to enter), it attempts to predict theidle duration and uses the predicted value for idle state selection.

It first uses a simple pattern recognition algorithm to obtain a preliminaryidle duration prediction. Namely, it saves the last 8 observed idle durationvalues and, when predicting the idle duration next time, it computes the averageand variance of them. If the variance is small (smaller than 400 squaremilliseconds) or it is small relative to the average (the average is greaterthat 6 times the standard deviation), the average is regarded as the “typicalinterval” value. Otherwise, either the longest or the shortest (depending onwhich one is farther from the average) of the saved observed idle durationvalues is discarded and the computation is repeated for the remaining ones.

Again, if the variance of them is small (in the above sense), the average istaken as the “typical interval” value and so on, until either the “typicalinterval” is determined or too many data points are disregarded. In the lattercase, if the size of the set of data points still under consideration issufficiently large, the next idle duration is not likely to be above the largestidle duration value still in that set, so that value is taken as the predictednext idle duration. Finally, if the set of data points still underconsideration is too small, no prediction is made.

If the preliminary prediction of the next idle duration computed this way islong enough, the governor obtains the time until the closest timer event withthe assumption that the scheduler tick will be stopped. That time, referred toas thesleep length in what follows, is the upper bound on the time before thenext CPU wakeup. It is used to determine the sleep length range, which in turnis needed to get the sleep length correction factor.

Themenu governor maintains an array containing several correction factorvalues that correspond to different sleep length ranges organized so that eachrange represented in the array is approximately 10 times wider than the previousone.

The correction factor for the given sleep length range (determined beforeselecting the idle state for the CPU) is updated after the CPU has been wokenup and the closer the sleep length is to the observed idle duration, the closerto 1 the correction factor becomes (it must fall between 0 and 1 inclusive).The sleep length is multiplied by the correction factor for the range that itfalls into to obtain an approximation of the predicted idle duration that iscompared to the “typical interval” determined previously and the minimum ofthe two is taken as the final idle duration prediction.

If the “typical interval” value is small, which means that the CPU is likelyto be woken up soon enough, the sleep length computation is skipped as it maybe costly and the idle duration is simply predicted to equal the “typicalinterval” value.

Now, the governor is ready to walk the list of idle states and choose one ofthem. For this purpose, it compares the target residency of each state withthe predicted idle duration and the exit latency of it with the with the latencylimit coming from the power management quality of service, orPM QoS,framework. It selects the state with the target residency closest to the predictedidle duration, but still below it, and exit latency that does not exceed thelimit.

In the final step the governor may still need to refine the idle state selectionif it has not decided tostop the scheduler tick. Thathappens if the idle duration predicted by it is less than the tick period andthe tick has not been stopped already (in a previous iteration of the idleloop). Then, the sleep length used in the previous computations may not reflectthe real time until the closest timer event and if it really is greater thanthat time, the governor may need to select a shallower state with a suitabletarget residency.

The Timer Events Oriented (TEO) Governor¶

The timer events oriented (TEO) governor is an alternativeCPUIdle governorfor tickless systems. It follows the same basic strategy as themenuone: it always tries to find the deepest idle state suitable for thegiven conditions. However, it applies a different approach to that problem.

The idea of this governor is based on the observation that on many systemstimer interrupts are two or more orders of magnitude more frequent than anyother interrupt types, so they are likely to dominate CPU wakeup patterns.Moreover, in principle, the time when the next timer event is going to occurcan be determined at the idle state selection time, although doing that maybe costly, so it can be regarded as the most reliable source of informationfor idle state selection.

Of course, non-timer wakeup sources are more important in some use cases,but even then it is generally unnecessary to consider idle duration valuesgreater than the time till the next timer event, referred as the sleeplength in what follows, because the closest timer will ultimately wake up theCPU anyway unless it is woken up earlier.

However, since obtaining the sleep length may be costly, the governor firstchecks if it can select a shallow idle state using wakeup pattern informationfrom recent times, in which case it can do without knowing the sleep lengthat all. For this purpose, it counts CPU wakeup events and looks for an idlestate whose target residency has not exceeded the idle duration (measuredafter wakeup) in the majority of relevant recent cases. If the targetresidency of that state is small enough, it may be used right away and thesleep length need not be determined.

The computations carried out by this governor are based on using bins whoseboundaries are aligned with the target residency parameter values of the CPUidle states provided by theCPUIdle driver in the ascending order. That is,the first bin spans from 0 up to, but not including, the target residency ofthe second idle state (idle state 1), the second bin spans from the targetresidency of idle state 1 up to, but not including, the target residency ofidle state 2, the third bin spans from the target residency of idle state 2up to, but not including, the target residency of idle state 3 and so on.The last bin spans from the target residency of the deepest idle statesupplied by the driver to infinity.

Two metrics called “hits” and “intercepts” are associated with each bin.They are updated every time before selecting an idle state for the given CPUin accordance with what happened last time.

The “hits” metric reflects the relative frequency of situations in which thesleep length and the idle duration measured after CPU wakeup fall into thesame bin (that is, the CPU appears to wake up “on time” relative to the sleeplength). In turn, the “intercepts” metric reflects the relative frequency ofnon-timer wakeup events for which the measured idle duration falls into a binthat corresponds to an idle state shallower than the one whose bin is falleninto by the sleep length (these events are also referred to as “intercepts”below).

The governor also counts “intercepts” with the measured idle duration belowthe tick period length and uses this information when deciding whether or notto stop the scheduler tick.

In order to select an idle state for a CPU, the governor takes the followingsteps (modulo the possible latency constraint that must be taken into accounttoo):

1. Find the deepest enabled CPU idle state (the candidate idle state) andcompute 2 sums as follows:

   • The sum of the “hits” metric for all of the idle states shallower thanthe candidate one (it represents the cases in which the CPU was likelywoken up by a timer).

   • The sum of the “intercepts” metric for all of the idle states shallowerthan the candidate one (it represents the cases in which the CPU waslikely woken up by a non-timer wakeup source).

2. If the second sum computed in step 1 is greater than a half of the sum ofboth metrics for the candidate state bin and all subsequent bins (if any),a shallower idle state is likely to be more suitable, so look for it.

   • Traverse the enabled idle states shallower than the candidate one in thedescending order.

   • For each of them compute the sum of the “intercepts” metrics over allof the idle states between it and the candidate one (including theformer and excluding the latter).

   • If this sum is greater than a half of the second sum computed in step 1,use the given idle state as the new candidate one.

3. If the current candidate state is state 0 or its target residency is shortenough, return it and prevent the scheduler tick from being stopped.

4. Obtain the sleep length value and check if it is below the targetresidency of the current candidate state, in which case a new shallowercandidate state needs to be found, so look for it.

Representation of Idle States¶

For the CPU idle time management purposes all of the physical idle statessupported by the processor have to be represented as a one-dimensional array ofstructcpuidle_state objects each allowing an individual (logical) CPU to askthe processor hardware to enter an idle state of certain properties. If thereis a hierarchy of units in the processor, onestructcpuidle_state object cancover a combination of idle states supported by the units at different levels ofthe hierarchy. In that case, thetarget residency and exit latency parametersof it, must reflect the properties of the idle state at thedeepest level (i.e. the idle state of the unit containing all of the otherunits).

For example, take a processor with two cores in a larger unit referred to asa “module” and suppose that asking the hardware to enter a specific idle state(say “X”) at the “core” level by one core will trigger the module to try toenter a specific idle state of its own (say “MX”) if the other core is in idlestate “X” already. In other words, asking for idle state “X” at the “core”level gives the hardware a license to go as deep as to idle state “MX” at the“module” level, but there is no guarantee that this is going to happen (the coreasking for idle state “X” may just end up in that state by itself instead).Then, the target residency of thestructcpuidle_state object representingidle state “X” must reflect the minimum time to spend in idle state “MX” ofthe module (including the time needed to enter it), because that is the minimumtime the CPU needs to be idle to save any energy in case the hardware entersthat state. Analogously, the exit latency parameter of that object must coverthe exit time of idle state “MX” of the module (and usually its entry time too),because that is the maximum delay between a wakeup signal and the time the CPUwill start to execute the first new instruction (assuming that both cores in themodule will always be ready to execute instructions as soon as the modulebecomes operational as a whole).

There are processors without direct coordination between different levels of thehierarchy of units inside them, however. In those cases asking for an idlestate at the “core” level does not automatically affect the “module” level, forexample, in any way and theCPUIdle driver is responsible for the entirehandling of the hierarchy. Then, the definition of the idle state objects isentirely up to the driver, but still the physical properties of the idle statethat the processor hardware finally goes into must always follow the parametersused by the governor for idle state selection (for instance, the actual exitlatency of that idle state must not exceed the exit latency parameter of theidle state object selected by the governor).

In addition to the target residency and exit latency idle state parametersdiscussed above, the objects representing idle states each contain a few otherparameters describing the idle state and a pointer to the function to run inorder to ask the hardware to enter that state. Also, for eachstructcpuidle_state object, there is a correspondingstructcpuidle_state_usage one containing usagestatistics of the given idle state. That information is exposed by the kernelviasysfs.

For each CPU in the system, there is a/sys/devices/system/cpu/cpu<N>/cpuidle/directory insysfs, where the number<N> is assigned to the givenCPU at the initialization time. That directory contains a set of subdirectoriescalledstate0,state1 and so on, up to the number of idle stateobjects defined for the given CPU minus one. Each of these directoriescorresponds to one idle state object and the larger the number in its name, thedeeper the (effective) idle state represented by it. Each of them containsa number of files (attributes) representing the properties of the idle stateobject corresponding to it, as follows:

above

Total number of times this idle state had been asked for, but theobserved idle duration was certainly too short to match its targetresidency.

below

Total number of times this idle state had been asked for, but certainlya deeper idle state would have been a better match for the observed idleduration.

desc

Description of the idle state.

disable

Whether or not this idle state is disabled.

default_status

The default status of this state, “enabled” or “disabled”.

latency

Exit latency of the idle state in microseconds.

name

Name of the idle state.

power

Power drawn by hardware in this idle state in milliwatts (if specified,0 otherwise).

residency

Target residency of the idle state in microseconds.

time

Total time spent in this idle state by the given CPU (as measured by thekernel) in microseconds.

usage

Total number of times the hardware has been asked by the given CPU toenter this idle state.

rejected

Total number of times a request to enter this idle state on the givenCPU was rejected.

Thedesc andname files both contain strings. The differencebetween them is that the name is expected to be more concise, while thedescription may be longer and it may contain white space or special characters.The other files listed above contain integer numbers.

Thedisable attribute is the only writeable one. If it contains 1, thegiven idle state is disabled for this particular CPU, which means that thegovernor will never select it for this particular CPU and theCPUIdledriver will never ask the hardware to enter it for that CPU as a result.However, disabling an idle state for one CPU does not prevent it from beingasked for by the other CPUs, so it must be disabled for all of them in order tonever be asked for by any of them. [Note that, due to the way theladdergovernor is implemented, disabling an idle state prevents that governor fromselecting any idle states deeper than the disabled one too.]

If thedisable attribute contains 0, the given idle state is enabled forthis particular CPU, but it still may be disabled for some or all of the otherCPUs in the system at the same time. Writing 1 to it causes the idle state tobe disabled for this particular CPU and writing 0 to it allows the governor totake it into consideration for the given CPU and the driver to ask for it,unless that state was disabled globally in the driver (in which case it cannotbe used at all).

Thepower attribute is not defined very well, especially for idle stateobjects representing combinations of idle states at different levels of thehierarchy of units in the processor, and it generally is hard to obtain idlestate power numbers for complex hardware, sopower often contains 0 (notavailable) and if it contains a nonzero number, that number may not be veryaccurate and it should not be relied on for anything meaningful.

The number in thetime file generally may be greater than the total timereally spent by the given CPU in the given idle state, because it is measured bythe kernel and it may not cover the cases in which the hardware refused to enterthis idle state and entered a shallower one instead of it (or even it did notenter any idle state at all). The kernel can only measure the time span betweenasking the hardware to enter an idle state and the subsequent wakeup of the CPUand it cannot say what really happened in the meantime at the hardware level.Moreover, if the idle state object in question represents a combination of idlestates at different levels of the hierarchy of units in the processor,the kernel can never say how deep the hardware went down the hierarchy in anyparticular case. For these reasons, the only reliable way to find out howmuch time has been spent by the hardware in different idle states supported byit is to use idle state residency counters in the hardware, if available.

Generally, an interrupt received when trying to enter an idle state causes theidle state entry request to be rejected, in which case theCPUIdle drivermay return an error code to indicate that this was the case. Theusageandrejected files report the number of times the given idle statewas entered successfully or rejected, respectively.

Power Management Quality of Service for CPUs¶

The power management quality of service (PM QoS) framework in the Linux kernelallows kernel code and user space processes to set constraints on variousenergy-efficiency features of the kernel to prevent performance from droppingbelow a required level.

CPU idle time management can be affected by PM QoS in two ways, through theglobal CPU latency limit and through the resume latency constraints forindividual CPUs. Kernel code (e.g. device drivers) can set both of them withthe help of special internal interfaces provided by the PM QoS framework. Userspace can modify the former by opening thecpu_dma_latency specialdevice file under/dev/ and writing a binary value (interpreted as asigned 32-bit integer) to it. In turn, the resume latency constraint for a CPUcan be modified from user space by writing a string (representing a signed32-bit integer) to thepower/pm_qos_resume_latency_us file under/sys/devices/system/cpu/cpu<N>/ insysfs, where the CPU number<N> is allocated at the system initialization time. Negative valueswill be rejected in both cases and, also in both cases, the written integernumber will be interpreted as a requested PM QoS constraint in microseconds.

The requested value is not automatically applied as a new constraint, however,as it may be less restrictive (greater in this particular case) than anotherconstraint previously requested by someone else. For this reason, the PM QoSframework maintains a list of requests that have been made so far for theglobal CPU latency limit and for each individual CPU, aggregates them andapplies the effective (minimum in this particular case) value as the newconstraint.

In fact, opening thecpu_dma_latency special device file causes a newPM QoS request to be created and added to a global priority list of CPU latencylimit requests and the file descriptor coming from the “open” operationrepresents that request. If that file descriptor is then used for writing, thenumber written to it will be associated with the PM QoS request represented byit as a new requested limit value. Next, the priority list mechanism will beused to determine the new effective value of the entire list of requests andthat effective value will be set as a new CPU latency limit. Thus requesting anew limit value will only change the real limit if the effective “list” value isaffected by it, which is the case if it is the minimum of the requested valuesin the list.

The process holding a file descriptor obtained by opening thecpu_dma_latency special device file controls the PM QoS requestassociated with that file descriptor, but it controls this particular PM QoSrequest only.

Closing thecpu_dma_latency special device file or, more precisely, thefile descriptor obtained while opening it, causes the PM QoS request associatedwith that file descriptor to be removed from the global priority list of CPUlatency limit requests and destroyed. If that happens, the priority listmechanism will be used again, to determine the new effective value for the wholelist and that value will become the new limit.

In turn, for each CPU there is one resume latency PM QoS request associated withthepower/pm_qos_resume_latency_us file under/sys/devices/system/cpu/cpu<N>/ insysfs and writing to it causesthis single PM QoS request to be updated regardless of which user spaceprocess does that. In other words, this PM QoS request is shared by the entireuser space, so access to the file associated with it needs to be arbitratedto avoid confusion. [Arguably, the only legitimate use of this mechanism inpractice is to pin a process to the CPU in question and let it use thesysfs interface to control the resume latency constraint for it.] It isstill only a request, however. It is an entry in a priority list used todetermine the effective value to be set as the resume latency constraint for theCPU in question every time the list of requests is updated this way or another(there may be other requests coming from kernel code in that list).

CPU idle time governors are expected to regard the minimum of the global(effective) CPU latency limit and the effective resume latency constraint forthe given CPU as the upper limit for the exit latency of the idle states thatthey are allowed to select for that CPU. They should never select any idlestates with exit latency beyond that limit.

While the above CPU QoS constraints apply to CPU idle time management, userspace may also request a CPU system wakeup latency QoS limit, via thecpu_wakeup_latency file. This QoS constraint is respected when selecting asuitable idle state for the CPUs, while entering the system-wide suspend-to-idlesleep state, but also to the regular CPU idle time management.

Note that, the management of thecpu_wakeup_latency file works according tothe ‘cpu_dma_latency’ file from user space point of view. Moreover, the unitis also microseconds.

Idle States Control Via Kernel Command Line¶

In addition to thesysfs interface allowing individual idle states to bedisabled for individual CPUs, there are kernelcommand line parameters affecting CPU idle time management.

Thecpuidle.off=1 kernel command line option can be used to disable theCPU idle time management entirely. It does not prevent the idle loop fromrunning on idle CPUs, but it prevents the CPU idle time governors and driversfrom being invoked. If it is added to the kernel command line, the idle loopwill ask the hardware to enter idle states on idle CPUs via the CPU architecturesupport code that is expected to provide a default mechanism for this purpose.That default mechanism usually is the least common denominator for all of theprocessors implementing the architecture (i.e. CPU instruction set) in question,however, so it is rather crude and not very energy-efficient. For this reason,it is not recommended for production use.

Thecpuidle.governor= kernel command line switch allows theCPUIdlegovernor to use to be specified. It has to be appended with a string matchingthe name of an available governor (e.g.cpuidle.governor=menu) and thatgovernor will be used instead of the default one. It is possible to forcethemenu governor to be used on the systems that use theladder governorby default this way, for example.

The other kernel command line parameters controlling CPU idle time managementdescribed below are only relevant for thex86 architecture and referencestointel_idle affect Intel processors only.

Thex86 architecture support code recognizes three kernel command lineoptions related to CPU idle time management:idle=poll,idle=halt,andidle=nomwait. The first two of them disable theacpi_idle andintel_idle drivers altogether, which effectively causes the entireCPUIdle subsystem to be disabled and makes the idle loop invoke thearchitecture support code to deal with idle CPUs. How it does that depends onwhich of the two parameters is added to the kernel command line. In theidle=halt case, the architecture support code will use theHLTinstruction of the CPUs (which, as a rule, suspends the execution of the programand causes the hardware to attempt to enter the shallowest available idle state)for this purpose, and ifidle=poll is used, idle CPUs will execute amore or less “lightweight” sequence of instructions in a tight loop. [Notethat usingidle=poll is somewhat drastic in many cases, as preventing idleCPUs from saving almost any energy at all may not be the only effect of it.For example, on Intel hardware it effectively prevents CPUs from usingP-states (seeCPU Performance Scaling) that require any number of CPUs in a package to beidle, so it very well may hurt single-thread computations performance as well asenergy-efficiency. Thus using it for performance reasons may not be a good ideaat all.]

Theidle=nomwait option prevents the use ofMWAIT instruction ofthe CPU to enter idle states. When this option is used, theacpi_idledriver will use theHLT instruction instead ofMWAIT. On systemsrunning Intel processors, this option disables theintel_idle driverand forces the use of theacpi_idle driver instead. Note that in eithercase,acpi_idle driver will function only if all the information neededby it is in the system’s ACPI tables.

In addition to the architecture-level kernel command line options affecting CPUidle time management, there are parameters affecting individualCPUIdledrivers that can be passed to them via the kernel command line. Specifically,theintel_idle.max_cstate=<n> andprocessor.max_cstate=<n> parameters,where<n> is an idle state index also used in the name of the givenstate’s directory insysfs (seeRepresentation of Idle States), causes theintel_idle andacpi_idle drivers, respectively, to discard all of theidle states deeper than idle state<n>. In that case, they will never askfor any of those idle states or expose them to the governor. [The behavior ofthe two drivers is different for<n> equal to0. Addingintel_idle.max_cstate=0 to the kernel command line disables theintel_idle driver and allowsacpi_idle to be used, whereasprocessor.max_cstate=0 is equivalent toprocessor.max_cstate=1.Also, theacpi_idle driver is part of theprocessor kernel module thatcan be loaded separately andmax_cstate=<n> can be passed to it as a moduleparameter when it is loaded.]