2.1.1.Amiga 4-joystick parallel port extension¶

Parallel port pins:

2.1.2.Amiga digital joystick¶

2.1.3.Amiga mouse¶

2.1.4.Amiga analog joystick¶

2.1.5.Amiga lightpen¶

2.2.1.JOY0DAT/JOY1DAT¶

These addresses each read a 16 bit register. These in turnare loaded from the MDAT serial stream and are clocked in onthe rising edge of SCLK. MLD output is used to parallel loadthe external parallel-to-serial converter. This in turn isloaded with the 4 quadrature inputs from each of two gamecontroller ports (8 total) plus 8 miscellaneous control bitswhich are new for LISA and can be read in upper 8 bits ofLISAID.

Register bits are as follows:

• Mouse counter usage (pins 1,3 =Yclock, pins 2,4 =Xclock)

0=LEFT CONTROLLER PAIR, 1=RIGHT CONTROLLER PAIR.(4 counters total). The bit usage for both left and rightaddresses is shown below. Each 6 bit counter (Y7-Y2,X7-X2) isclocked by 2 of the signals input from the mouse serialstream. Starting with first bit received:

Serial	Bit Name	Description
0	M0H	JOY0DAT Horizontal Clock
1	M0HQ	JOY0DAT Horizontal Clock (quadrature)
2	M0V	JOY0DAT Vertical Clock
3	M0VQ	JOY0DAT Vertical Clock (quadrature)
4	M1V	JOY1DAT Horizontal Clock
5	M1VQ	JOY1DAT Horizontal Clock (quadrature)
6	M1V	JOY1DAT Vertical Clock
7	M1VQ	JOY1DAT Vertical Clock (quadrature)

Bits 1 and 0 of each counter (Y1-Y0,X1-X0) may beread to determine the state of the related input signal pair.This allows these pins to double as joystick switch inputs.Joystick switch closures can be deciphered as follows:

Directions	Pin#	Counter bits
Forward	1	Y1 xor Y0 (BIT#09 xor BIT#08)
Left	3	Y1
Back	2	X1 xor X0 (BIT#01 xor BIT#00)
Right	4	X1

2.2.2.JOYTEST¶

Mouse counter write test data:

2.2.3.POT0DAT/POT1DAT¶

These addresses each read a pair of 8 bit pot counters.(4 counters total). The bit assignment for bothaddresses is shown below. The counters are stopped by signalsfrom 2 controller connectors (left-right) with 2 pins each.

CONNECTORS				PAULA
Loc.	Dir.	Sym	pin	pin
RIGHT	Y	RX	9	33
RIGHT	X	RX	5	32
LEFT	Y	LY	9	36
LEFT	X	LX	5	35

With normal (NTSC or PAL) horiz. line rate, the pots willgive a full scale (FF) reading with about 500k ohm in oneframe time. With proportionally faster horiz. line times,the counters will count proportionally faster.This should be noted when doing variable beam displays.

2.2.4.POTGO¶

2.2.5.POTINP¶

This register controls a 4 bit bi-direction I/O portthat shares the same 4 pins as the 4 pot counters above.

BIT#	FUNCTION	DESCRIPTION
15	OUTRY	Output enable for Paula pin 33
14	DATRY	I/O data Paula pin 33
13	OUTRX	Output enable for Paula pin 32
12	DATRX	I/O data Paula pin 32
11	OUTLY	Out put enable for Paula pin 36
10	DATLY	I/O data Paula pin 36
09	OUTLX	Output enable for Paula pin 35
08	DATLX	I/O data Paula pin 35
07-01	X	Not used
00	START	Start pots (dump capacitors, start counters)