Linux generic IRQ handling

Copyright:

© 2005-2010: Thomas Gleixner

Copyright:

© 2005-2006: Ingo Molnar

Introduction

The generic interrupt handling layer is designed to provide a completeabstraction of interrupt handling for device drivers. It is able tohandle all the different types of interrupt controller hardware. Devicedrivers use generic API functions to request, enable, disable and freeinterrupts. The drivers do not have to know anything about interrupthardware details, so they can be used on different platforms withoutcode changes.

This documentation is provided to developers who want to implement aninterrupt subsystem based for their architecture, with the help of thegeneric IRQ handling layer.

Rationale

The original implementation of interrupt handling in Linux uses the__do_IRQ() super-handler, which is able to deal with every type ofinterrupt logic.

Originally, Russell King identified different types of handlers to builda quite universal set for the ARM interrupt handler implementation inLinux 2.5/2.6. He distinguished between:

  • Level type

  • Edge type

  • Simple type

During the implementation we identified another type:

  • Fast EOI type

In the SMP world of the__do_IRQ() super-handler another type wasidentified:

  • Per CPU type

This split implementation of high-level IRQ handlers allows us tooptimize the flow of the interrupt handling for each specific interrupttype. This reduces complexity in that particular code path and allowsthe optimized handling of a given type.

The original general IRQ implementation used hw_interrupt_typestructures and their->ack,->end [etc.] callbacks to differentiatethe flow control in the super-handler. This leads to a mix of flow logicand low-level hardware logic, and it also leads to unnecessary codeduplication: for example in i386, there is anioapic_level_irq and anioapic_edge_irq IRQ-type which share many of the low-level details buthave different flow handling.

A more natural abstraction is the clean separation of the ‘irq flow’ andthe ‘chip details’.

Analysing a couple of architecture’s IRQ subsystem implementationsreveals that most of them can use a generic set of ‘irq flow’ methodsand only need to add the chip-level specific code. The separation isalso valuable for (sub)architectures which need specific quirks in theIRQ flow itself but not in the chip details - and thus provides a moretransparent IRQ subsystem design.

Each interrupt descriptor is assigned its own high-level flow handler,which is normally one of the generic implementations. (This high-levelflow handler implementation also makes it simple to providedemultiplexing handlers which can be found in embedded platforms onvarious architectures.)

The separation makes the generic interrupt handling layer more flexibleand extensible. For example, an (sub)architecture can use a genericIRQ-flow implementation for ‘level type’ interrupts and add a(sub)architecture specific ‘edge type’ implementation.

To make the transition to the new model easier and prevent the breakageof existing implementations, the__do_IRQ() super-handler is stillavailable. This leads to a kind of duality for the time being. Over timethe new model should be used in more and more architectures, as itenables smaller and cleaner IRQ subsystems. It’s deprecated for threeyears now and about to be removed.

Known Bugs And Assumptions

None (knock on wood).

Abstraction layers

There are three main levels of abstraction in the interrupt code:

  1. High-level driver API

  2. High-level IRQ flow handlers

  3. Chip-level hardware encapsulation

Interrupt control flow

Each interrupt is described by an interrupt descriptor structureirq_desc. The interrupt is referenced by an ‘unsigned int’ numericvalue which selects the corresponding interrupt description structure inthe descriptor structures array. The descriptor structure containsstatus information and pointers to the interrupt flow method and theinterrupt chip structure which are assigned to this interrupt.

Whenever an interrupt triggers, the low-level architecture code callsinto the generic interrupt code by calling desc->handle_irq(). Thishigh-level IRQ handling function only uses desc->irq_data.chipprimitives referenced by the assigned chip descriptor structure.

High-level Driver API

The high-level Driver API consists of following functions:

See the autogenerated function documentation for details.

High-level IRQ flow handlers

The generic layer provides a set of pre-defined irq-flow methods:

The interrupt flow handlers (either pre-defined or architecturespecific) are assigned to specific interrupts by the architecture eitherduring bootup or during device initialization.

Default flow implementations

Helper functions

The helper functions call the chip primitives and are used by thedefault flow implementations. The following helper functions areimplemented (simplified excerpt):

default_enable(struct irq_data *data){    desc->irq_data.chip->irq_unmask(data);}default_disable(struct irq_data *data){    if (!delay_disable(data))        desc->irq_data.chip->irq_mask(data);}default_ack(struct irq_data *data){    chip->irq_ack(data);}default_mask_ack(struct irq_data *data){    if (chip->irq_mask_ack) {        chip->irq_mask_ack(data);    } else {        chip->irq_mask(data);        chip->irq_ack(data);    }}noop(struct irq_data *data){}

Default flow handler implementations

Default Level IRQ flow handler

handle_level_irq provides a generic implementation for level-triggeredinterrupts.

The following control flow is implemented (simplified excerpt):

desc->irq_data.chip->irq_mask_ack();handle_irq_event(desc->action);desc->irq_data.chip->irq_unmask();
Default Fast EOI IRQ flow handler

handle_fasteoi_irq provides a generic implementation for interrupts,which only need an EOI at the end of the handler.

The following control flow is implemented (simplified excerpt):

handle_irq_event(desc->action);desc->irq_data.chip->irq_eoi();
Default Edge IRQ flow handler

handle_edge_irq provides a generic implementation for edge-triggeredinterrupts.

The following control flow is implemented (simplified excerpt):

if (desc->status & running) {    desc->irq_data.chip->irq_mask_ack();    desc->status |= pending | masked;    return;}desc->irq_data.chip->irq_ack();desc->status |= running;do {    if (desc->status & masked)        desc->irq_data.chip->irq_unmask();    desc->status &= ~pending;    handle_irq_event(desc->action);} while (desc->status & pending);desc->status &= ~running;
Default simple IRQ flow handler

handle_simple_irq provides a generic implementation for simpleinterrupts.

Note

The simple flow handler does not call any handler/chip primitives.

The following control flow is implemented (simplified excerpt):

handle_irq_event(desc->action);
Default per CPU flow handler

handle_percpu_irq provides a generic implementation for per CPUinterrupts.

Per CPU interrupts are only available on SMP and the handler provides asimplified version without locking.

The following control flow is implemented (simplified excerpt):

if (desc->irq_data.chip->irq_ack)    desc->irq_data.chip->irq_ack();handle_irq_event(desc->action);if (desc->irq_data.chip->irq_eoi)    desc->irq_data.chip->irq_eoi();
EOI Edge IRQ flow handler

handle_edge_eoi_irq provides an abnomination of the edge handlerwhich is solely used to tame a badly wreckaged irq controller onpowerpc/cell.

Bad IRQ flow handler

handle_bad_irq is used for spurious interrupts which have no realhandler assigned..

Quirks and optimizations

The generic functions are intended for ‘clean’ architectures and chips,which have no platform-specific IRQ handling quirks. If an architectureneeds to implement quirks on the ‘flow’ level then it can do so byoverriding the high-level irq-flow handler.

Delayed interrupt disable

This per interrupt selectable feature, which was introduced by RussellKing in the ARM interrupt implementation, does not mask an interrupt atthe hardware level whendisable_irq() is called. The interrupt is keptenabled and is masked in the flow handler when an interrupt eventhappens. This prevents losing edge interrupts on hardware which does notstore an edge interrupt event while the interrupt is disabled at thehardware level. When an interrupt arrives while the IRQ_DISABLED flagis set, then the interrupt is masked at the hardware level and theIRQ_PENDING bit is set. When the interrupt is re-enabled byenable_irq() the pending bit is checked and if it is set, the interruptis resent either via hardware or by a software resend mechanism. (It’snecessary to enable CONFIG_HARDIRQS_SW_RESEND when you want to usethe delayed interrupt disable feature and your hardware is not capableof retriggering an interrupt.) The delayed interrupt disable is notconfigurable.

Chip-level hardware encapsulation

The chip-level hardware descriptor structureirq_chip contains allthe direct chip relevant functions, which can be utilized by the irq flowimplementations.

  • irq_ack

  • irq_mask_ack - Optional, recommended for performance

  • irq_mask

  • irq_unmask

  • irq_eoi - Optional, required for EOI flow handlers

  • irq_retrigger - Optional

  • irq_set_type - Optional

  • irq_set_wake - Optional

These primitives are strictly intended to mean what they say: ack meansACK, masking means masking of an IRQ line, etc. It is up to the flowhandler(s) to use these basic units of low-level functionality.

__do_IRQ entry point

The original implementation__do_IRQ() was an alternative entry pointfor all types of interrupts. It no longer exists.

This handler turned out to be not suitable for all interrupt hardwareand was therefore reimplemented with split functionality foredge/level/simple/percpu interrupts. This is not only a functionaloptimization. It also shortens code paths for interrupts.

Locking on SMP

The locking of chip registers is up to the architecture that defines thechip primitives. The per-irq structure is protected via desc->lock, bythe generic layer.

Generic interrupt chip

To avoid copies of identical implementations of IRQ chips the coreprovides a configurable generic interrupt chip implementation.Developers should check carefully whether the generic chip fits theirneeds before implementing the same functionality slightly differentlythemselves.

voidirq_gc_noop(structirq_data*d)

NOOP function

Parameters

structirq_data*d

irq_data

voidirq_gc_mask_disable_reg(structirq_data*d)

Mask chip via disable register

Parameters

structirq_data*d

irq_data

Description

Chip has separate enable/disable registers instead of a single maskregister.

voidirq_gc_mask_set_bit(structirq_data*d)

Mask chip via setting bit in mask register

Parameters

structirq_data*d

irq_data

Description

Chip has a single mask register. Values of this register are cachedand protected by gc->lock

voidirq_gc_mask_clr_bit(structirq_data*d)

Mask chip via clearing bit in mask register

Parameters

structirq_data*d

irq_data

Description

Chip has a single mask register. Values of this register are cachedand protected by gc->lock

voidirq_gc_unmask_enable_reg(structirq_data*d)

Unmask chip via enable register

Parameters

structirq_data*d

irq_data

Description

Chip has separate enable/disable registers instead of a single maskregister.

voidirq_gc_ack_set_bit(structirq_data*d)

Ack pending interrupt via setting bit

Parameters

structirq_data*d

irq_data

voidirq_gc_mask_disable_and_ack_set(structirq_data*d)

Mask and ack pending interrupt

Parameters

structirq_data*d

irq_data

Description

This generic implementation of the irq_mask_ack method is for chipswith separate enable/disable registers instead of a single maskregister and where a pending interrupt is acknowledged by setting abit.

Note

This is the only permutation currently used. Similar genericfunctions should be added here if other permutations are required.

intirq_gc_set_wake(structirq_data*d,unsignedinton)

Set/clr wake bit for an interrupt

Parameters

structirq_data*d

irq_data

unsignedinton

Indicates whether the wake bit should be set or cleared

Description

For chips where the wake from suspend functionality is notconfigured in a separate register and the wakeup active state isjust stored in a bitmask.

structirq_chip_generic*irq_alloc_generic_chip(constchar*name,intnum_ct,unsignedintirq_base,void__iomem*reg_base,irq_flow_handler_thandler)

Allocate a generic chip and initialize it

Parameters

constchar*name

Name of the irq chip

intnum_ct

Number of irq_chip_type instances associated with this

unsignedintirq_base

Interrupt base nr for this chip

void__iomem*reg_base

Register base address (virtual)

irq_flow_handler_thandler

Default flow handler associated with this chip

Description

Returns an initialized irq_chip_generic structure. The chip defaultsto the primary (index 0) irq_chip_type andhandler

intirq_domain_alloc_generic_chips(structirq_domain*d,conststructirq_domain_chip_generic_info*info)

Allocate generic chips for an irq domain

Parameters

structirq_domain*d

irq domain for which to allocate chips

conststructirq_domain_chip_generic_info*info

Generic chip information

Return

0 on success, negative error code on failure

voidirq_domain_remove_generic_chips(structirq_domain*d)

Remove generic chips from an irq domain

Parameters

structirq_domain*d

irq domain for which generic chips are to be removed

int__irq_alloc_domain_generic_chips(structirq_domain*d,intirqs_per_chip,intnum_ct,constchar*name,irq_flow_handler_thandler,unsignedintclr,unsignedintset,enumirq_gc_flagsgcflags)

Allocate generic chips for an irq domain

Parameters

structirq_domain*d

irq domain for which to allocate chips

intirqs_per_chip

Number of interrupts each chip handles (max 32)

intnum_ct

Number of irq_chip_type instances associated with this

constchar*name

Name of the irq chip

irq_flow_handler_thandler

Default flow handler associated with these chips

unsignedintclr

IRQ_* bits to clear in the mapping function

unsignedintset

IRQ_* bits to set in the mapping function

enumirq_gc_flagsgcflags

Generic chip specific setup flags

structirq_chip_generic*irq_get_domain_generic_chip(structirq_domain*d,unsignedinthw_irq)

Get a pointer to the generic chip of a hw_irq

Parameters

structirq_domain*d

irq domain pointer

unsignedinthw_irq

Hardware interrupt number

voidirq_setup_generic_chip(structirq_chip_generic*gc,u32msk,enumirq_gc_flagsflags,unsignedintclr,unsignedintset)

Setup a range of interrupts with a generic chip

Parameters

structirq_chip_generic*gc

Generic irq chip holding all data

u32msk

Bitmask holding the irqs to initialize relative to gc->irq_base

enumirq_gc_flagsflags

Flags for initialization

unsignedintclr

IRQ_* bits to clear

unsignedintset

IRQ_* bits to set

Description

Set up max. 32 interrupts starting from gc->irq_base. Note, thisinitializes all interrupts to the primary irq_chip_type and itsassociated handler.

intirq_setup_alt_chip(structirq_data*d,unsignedinttype)

Switch to alternative chip

Parameters

structirq_data*d

irq_data for this interrupt

unsignedinttype

Flow type to be initialized

Description

Only to be called from chip->irq_set_type() callbacks.

voidirq_remove_generic_chip(structirq_chip_generic*gc,u32msk,unsignedintclr,unsignedintset)

Remove a chip

Parameters

structirq_chip_generic*gc

Generic irq chip holding all data

u32msk

Bitmask holding the irqs to initialize relative to gc->irq_base

unsignedintclr

IRQ_* bits to clear

unsignedintset

IRQ_* bits to set

Description

Remove up to 32 interrupts starting from gc->irq_base.

Structures

This chapter contains the autogenerated documentation of the structureswhich are used in the generic IRQ layer.

structirq_common_data

per irq data shared by all irqchips

Definition:

struct irq_common_data {    unsigned int  state_use_accessors;#ifdef CONFIG_NUMA;    unsigned int            node;#endif;    void *handler_data;    struct msi_desc         *msi_desc;#ifdef CONFIG_SMP;    cpumask_var_t affinity;#endif;#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK;    cpumask_var_t effective_affinity;#endif;#ifdef CONFIG_GENERIC_IRQ_IPI;    unsigned int            ipi_offset;#endif;};

Members

state_use_accessors

status information for irq chip functions.Use accessor functions to deal with it

node

node index useful for balancing

handler_data

per-IRQ data for the irq_chip methods

msi_desc

MSI descriptor

affinity

IRQ affinity on SMP. If this is an IPIrelated irq, then this is the mask of theCPUs to which an IPI can be sent.

effective_affinity

The effective IRQ affinity on SMP as some irqchips do not allow multi CPU destinations.A subset ofaffinity.

ipi_offset

Offset of first IPI target cpu inaffinity. Optional.

structirq_data

per irq chip data passed down to chip functions

Definition:

struct irq_data {    u32 mask;    unsigned int            irq;    irq_hw_number_t hwirq;    struct irq_common_data  *common;    struct irq_chip         *chip;    struct irq_domain       *domain;#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY;    struct irq_data         *parent_data;#endif;    void *chip_data;};

Members

mask

precomputed bitmask for accessing the chip registers

irq

interrupt number

hwirq

hardware interrupt number, local to the interrupt domain

common

point to data shared by all irqchips

chip

low level interrupt hardware access

domain

Interrupt translation domain; responsible for mappingbetween hwirq number and linux irq number.

parent_data

pointer to parentstructirq_data to support hierarchyirq_domain

chip_data

platform-specific per-chip private data for the chipmethods, to allow shared chip implementations

structirq_chip

hardware interrupt chip descriptor

Definition:

struct irq_chip {    const char      *name;    unsigned int    (*irq_startup)(struct irq_data *data);    void (*irq_shutdown)(struct irq_data *data);    void (*irq_enable)(struct irq_data *data);    void (*irq_disable)(struct irq_data *data);    void (*irq_ack)(struct irq_data *data);    void (*irq_mask)(struct irq_data *data);    void (*irq_mask_ack)(struct irq_data *data);    void (*irq_unmask)(struct irq_data *data);    void (*irq_eoi)(struct irq_data *data);    int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);    int (*irq_retrigger)(struct irq_data *data);    int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);    int (*irq_set_wake)(struct irq_data *data, unsigned int on);    void (*irq_bus_lock)(struct irq_data *data);    void (*irq_bus_sync_unlock)(struct irq_data *data);#ifdef CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE;    void (*irq_cpu_online)(struct irq_data *data);    void (*irq_cpu_offline)(struct irq_data *data);#endif;    void (*irq_suspend)(struct irq_data *data);    void (*irq_resume)(struct irq_data *data);    void (*irq_pm_shutdown)(struct irq_data *data);    void (*irq_calc_mask)(struct irq_data *data);    void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);    int (*irq_request_resources)(struct irq_data *data);    void (*irq_release_resources)(struct irq_data *data);    void (*irq_compose_msi_msg)(struct irq_data *data, struct msi_msg *msg);    void (*irq_write_msi_msg)(struct irq_data *data, struct msi_msg *msg);    int (*irq_get_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool *state);    int (*irq_set_irqchip_state)(struct irq_data *data, enum irqchip_irq_state which, bool state);    int (*irq_set_vcpu_affinity)(struct irq_data *data, void *vcpu_info);    void (*ipi_send_single)(struct irq_data *data, unsigned int cpu);    void (*ipi_send_mask)(struct irq_data *data, const struct cpumask *dest);    int (*irq_nmi_setup)(struct irq_data *data);    void (*irq_nmi_teardown)(struct irq_data *data);    void (*irq_force_complete_move)(struct irq_data *data);    unsigned long   flags;};

Members

name

name for /proc/interrupts

irq_startup

start up the interrupt (defaults to ->enable if NULL)

irq_shutdown

shut down the interrupt (defaults to ->disable if NULL)

irq_enable

enable the interrupt (defaults to chip->unmask if NULL)

irq_disable

disable the interrupt

irq_ack

start of a new interrupt

irq_mask

mask an interrupt source

irq_mask_ack

ack and mask an interrupt source

irq_unmask

unmask an interrupt source

irq_eoi

end of interrupt

irq_set_affinity

Set the CPU affinity on SMP machines. If the forceargument is true, it tells the driver tounconditionally apply the affinity setting. Sanitychecks against the supplied affinity mask are notrequired. This is used for CPU hotplug where thetarget CPU is not yet set in the cpu_online_mask.

irq_retrigger

resend an IRQ to the CPU

irq_set_type

set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ

irq_set_wake

enable/disable power-management wake-on of an IRQ

irq_bus_lock

function to lock access to slow bus (i2c) chips

irq_bus_sync_unlock

function to sync and unlock slow bus (i2c) chips

irq_cpu_online

configure an interrupt source for a secondary CPU

irq_cpu_offline

un-configure an interrupt source for a secondary CPU

irq_suspend

function called from core code on suspend once perchip, when one or more interrupts are installed

irq_resume

function called from core code on resume once per chip,when one ore more interrupts are installed

irq_pm_shutdown

function called from core code on shutdown once per chip

irq_calc_mask

Optional function to set irq_data.mask for special cases

irq_print_chip

optional to print special chip info in show_interrupts

irq_request_resources

optional to request resources before callingany other callback related to this irq

irq_release_resources

optional to release resources acquired withirq_request_resources

irq_compose_msi_msg

optional to compose message content for MSI

irq_write_msi_msg

optional to write message content for MSI

irq_get_irqchip_state

return the internal state of an interrupt

irq_set_irqchip_state

set the internal state of a interrupt

irq_set_vcpu_affinity

optional to target a vCPU in a virtual machine

ipi_send_single

send a single IPI to destination cpus

ipi_send_mask

send an IPI to destination cpus in cpumask

irq_nmi_setup

function called from core code before enabling an NMI

irq_nmi_teardown

function called from core code after disabling an NMI

irq_force_complete_move

optional function to force complete pending irq move

flags

chip specific flags

structirq_chip_regs

register offsets forstructirq_gci

Definition:

struct irq_chip_regs {    unsigned long           enable;    unsigned long           disable;    unsigned long           mask;    unsigned long           ack;    unsigned long           eoi;    unsigned long           type;};

Members

enable

Enable register offset to reg_base

disable

Disable register offset to reg_base

mask

Mask register offset to reg_base

ack

Ack register offset to reg_base

eoi

Eoi register offset to reg_base

type

Type configuration register offset to reg_base

structirq_chip_type

Generic interrupt chip instance for a flow type

Definition:

struct irq_chip_type {    struct irq_chip         chip;    struct irq_chip_regs    regs;    irq_flow_handler_t handler;    u32 type;    u32 mask_cache_priv;    u32 *mask_cache;};

Members

chip

The real interrupt chip which provides the callbacks

regs

Register offsets for this chip

handler

Flow handler associated with this chip

type

Chip can handle these flow types

mask_cache_priv

Cached mask register private to the chip type

mask_cache

Pointer to cached mask register

Description

A irq_generic_chip can have several instances of irq_chip_type whenit requires different functions and register offsets for differentflow types.

structirq_chip_generic

Generic irq chip data structure

Definition:

struct irq_chip_generic {    raw_spinlock_t lock;    void __iomem            *reg_base;    u32 (*reg_readl)(void __iomem *addr);    void (*reg_writel)(u32 val, void __iomem *addr);    void (*suspend)(struct irq_chip_generic *gc);    void (*resume)(struct irq_chip_generic *gc);    unsigned int            irq_base;    unsigned int            irq_cnt;    u32 mask_cache;    u32 wake_enabled;    u32 wake_active;    unsigned int            num_ct;    void *private;    unsigned long           installed;    unsigned long           unused;    struct irq_domain       *domain;    struct list_head        list;    struct irq_chip_type    chip_types[];};

Members

lock

Lock to protect register and cache data access

reg_base

Register base address (virtual)

reg_readl

Alternate I/O accessor (defaults to readl if NULL)

reg_writel

Alternate I/O accessor (defaults to writel if NULL)

suspend

Function called from core code on suspend once perchip; can be useful instead of irq_chip::suspend tohandle chip details even when no interrupts are in use

resume

Function called from core code on resume once per chip;can be useful instead of irq_chip::suspend to handlechip details even when no interrupts are in use

irq_base

Interrupt base nr for this chip

irq_cnt

Number of interrupts handled by this chip

mask_cache

Cached mask register shared between all chip types

wake_enabled

Interrupt can wakeup from suspend

wake_active

Interrupt is marked as an wakeup from suspend source

num_ct

Number of available irq_chip_type instances (usually 1)

private

Private data for non generic chip callbacks

installed

bitfield to denote installed interrupts

unused

bitfield to denote unused interrupts

domain

irq domain pointer

list

List head for keeping track of instances

chip_types

Array of interrupt irq_chip_types

Description

Note, that irq_chip_generic can have multiple irq_chip_typeimplementations which can be associated to a particular irq line ofan irq_chip_generic instance. That allows to share and protectstate in an irq_chip_generic instance when we need to implementdifferent flow mechanisms (level/edge) for it.

enumirq_gc_flags

Initialization flags for generic irq chips

Constants

IRQ_GC_INIT_MASK_CACHE

Initialize the mask_cache by reading mask reg

IRQ_GC_INIT_NESTED_LOCK

Set the lock class of the irqs to nested forirq chips which need to callirq_set_wake() onthe parent irq. Usually GPIO implementations

IRQ_GC_MASK_CACHE_PER_TYPE

Mask cache is chip type private

IRQ_GC_NO_MASK

Do not calculate irq_data->mask

IRQ_GC_BE_IO

Use big-endian register accesses (default: LE)

structirq_domain_chip_generic_info

Generic chip information structure

Definition:

struct irq_domain_chip_generic_info {    const char              *name;    irq_flow_handler_t handler;    unsigned int            irqs_per_chip;    unsigned int            num_ct;    unsigned int            irq_flags_to_clear;    unsigned int            irq_flags_to_set;    enum irq_gc_flags       gc_flags;    int (*init)(struct irq_chip_generic *gc);    void (*exit)(struct irq_chip_generic *gc);};

Members

name

Name of the generic interrupt chip

handler

Interrupt handler used by the generic interrupt chip

irqs_per_chip

Number of interrupts each chip handles (max 32)

num_ct

Number of irq_chip_type instances associated with eachchip

irq_flags_to_clear

IRQ_* bits to clear in the mapping function

irq_flags_to_set

IRQ_* bits to set in the mapping function

gc_flags

Generic chip specific setup flags

init

Function called on each chip when they are created.Allow to do some additional chip initialisation.

exit

Function called on each chip when they are destroyed.Allow to do some chip cleanup operation.

structirqaction

per interrupt action descriptor

Definition:

struct irqaction {    irq_handler_t handler;    union {        void *dev_id;        void __percpu   *percpu_dev_id;    };    const struct cpumask    *affinity;    struct irqaction        *next;    irq_handler_t thread_fn;    struct task_struct      *thread;    struct irqaction        *secondary;    unsigned int            irq;    unsigned int            flags;    unsigned long           thread_flags;    unsigned long           thread_mask;    const char              *name;    struct proc_dir_entry   *dir;};

Members

handler

interrupt handler function

{unnamed_union}

anonymous

dev_id

cookie to identify the device

percpu_dev_id

cookie to identify the device

affinity

CPUs this irqaction is allowed to run on

next

pointer to the next irqaction for shared interrupts

thread_fn

interrupt handler function for threaded interrupts

thread

thread pointer for threaded interrupts

secondary

pointer to secondary irqaction (force threading)

irq

interrupt number

flags

flags (see IRQF_* above)

thread_flags

flags related tothread

thread_mask

bitmask for keeping track ofthread activity

name

name of the device

dir

pointer to the proc/irq/NN/name entry

intrequest_irq(unsignedintirq,irq_handler_thandler,unsignedlongflags,constchar*name,void*dev)

Add a handler for an interrupt line

Parameters

unsignedintirq

The interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.Primary handler for threaded interruptsIf NULL, the default primary handler is installed

unsignedlongflags

Handling flags

constchar*name

Name of the device generating this interrupt

void*dev

A cookie passed to the handler function

Description

This call allocates an interrupt and establishes a handler; seethe documentation forrequest_threaded_irq() for details.

structirq_affinity_notify

context for notification of IRQ affinity changes

Definition:

struct irq_affinity_notify {    unsigned int irq;    struct kref kref;    struct work_struct work;    void (*notify)(struct irq_affinity_notify *, const cpumask_t *mask);    void (*release)(struct kref *ref);};

Members

irq

Interrupt to which notification applies

kref

Reference count, for internal use

work

Work item, for internal use

notify

Function to be called on change. This will becalled in process context.

release

Function to be called on release. This will becalled in process context. Once registered, thestructure must only be freed when this function iscalled or later.

structirq_affinity

Description for automatic irq affinity assignments

Definition:

struct irq_affinity {    unsigned int    pre_vectors;    unsigned int    post_vectors;    unsigned int    nr_sets;    unsigned int    set_size[IRQ_AFFINITY_MAX_SETS];    void (*calc_sets)(struct irq_affinity *, unsigned int nvecs);    void *priv;};

Members

pre_vectors

Don’t apply affinity topre_vectors at beginning ofthe MSI(-X) vector space

post_vectors

Don’t apply affinity topost_vectors at end ofthe MSI(-X) vector space

nr_sets

The number of interrupt sets for which affinityspreading is required

set_size

Array holding the size of each interrupt set

calc_sets

Callback for calculating the number and sizeof interrupt sets

priv

Private data for usage bycalc_sets, usually apointer to driver/device specific data.

structirq_affinity_desc

Interrupt affinity descriptor

Definition:

struct irq_affinity_desc {    struct cpumask  mask;    unsigned int    is_managed : 1;};

Members

mask

cpumask to hold the affinity assignment

is_managed

1 if the interrupt is managed internally

intirq_update_affinity_hint(unsignedintirq,conststructcpumask*m)

Update the affinity hint

Parameters

unsignedintirq

Interrupt to update

conststructcpumask*m

cpumask pointer (NULL to clear the hint)

Description

Updates the affinity hint, but does not change the affinity of the interrupt.

intirq_set_affinity_and_hint(unsignedintirq,conststructcpumask*m)

Update the affinity hint and apply the provided cpumask to the interrupt

Parameters

unsignedintirq

Interrupt to update

conststructcpumask*m

cpumask pointer (NULL to clear the hint)

Description

Updates the affinity hint and ifm is not NULL it applies it as theaffinity of that interrupt.

Public Functions Provided

This chapter contains the autogenerated documentation of the kernel APIfunctions which are exported.

boolsynchronize_hardirq(unsignedintirq)

wait for pending hard IRQ handlers (on other CPUs)

Parameters

unsignedintirq

interrupt number to wait for

Description

This function waits for any pending hard IRQ handlers for this interruptto complete before returning. If you use this function while holding aresource the IRQ handler may need you will deadlock. It does not takeassociated threaded handlers into account.

Do not use this for shutdown scenarios where you must be sure that allparts (hardirq and threaded handler) have completed.

This function may be called - with care - from IRQ context.

It does not check whether there is an interrupt in flight at thehardware level, but not serviced yet, as this might deadlock when calledwith interrupts disabled and the target CPU of the interrupt is thecurrent CPU.

Return

false if a threaded handler is active.

voidsynchronize_irq(unsignedintirq)

wait for pending IRQ handlers (on other CPUs)

Parameters

unsignedintirq

interrupt number to wait for

Description

This function waits for any pending IRQ handlers for this interrupt tocomplete before returning. If you use this function while holding aresource the IRQ handler may need you will deadlock.

Can only be called from preemptible code as it might sleep whenan interrupt thread is associated toirq.

It optionally makes sure (when the irq chip supports that method)that the interrupt is not pending in any CPU and waiting forservice.

intirq_can_set_affinity(unsignedintirq)

Check if the affinity of a given irq can be set

Parameters

unsignedintirq

Interrupt to check

boolirq_can_set_affinity_usr(unsignedintirq)

Check if affinity of a irq can be set from user space

Parameters

unsignedintirq

Interrupt to check

Description

Likeirq_can_set_affinity() above, but additionally checks for theAFFINITY_MANAGED flag.

voidirq_set_thread_affinity(structirq_desc*desc)

Notify irq threads to adjust affinity

Parameters

structirq_desc*desc

irq descriptor which has affinity changed

Description

Just set IRQTF_AFFINITY and delegate the affinity setting to theinterrupt thread itself. We can not callset_cpus_allowed_ptr() here aswe hold desc->lock and this code can be called from hard interruptcontext.

intirq_update_affinity_desc(unsignedintirq,structirq_affinity_desc*affinity)

Update affinity management for an interrupt

Parameters

unsignedintirq

The interrupt number to update

structirq_affinity_desc*affinity

Pointer to the affinity descriptor

Description

This interface can be used to configure the affinity management ofinterrupts which have been allocated already.

There are certain limitations on when it may be used - attempts to use itfor when the kernel is configured for generic IRQ reservation mode (inconfig GENERIC_IRQ_RESERVATION_MODE) will fail, as it may conflict withmanaged/non-managed interrupt accounting. In addition, attempts to use it onan interrupt which is already started or which has already been configuredas managed will also fail, as these mean invalid init state or double init.

intirq_set_affinity(unsignedintirq,conststructcpumask*cpumask)

Set the irq affinity of a given irq

Parameters

unsignedintirq

Interrupt to set affinity

conststructcpumask*cpumask

cpumask

Description

Fails if cpumask does not contain an online CPU

intirq_force_affinity(unsignedintirq,conststructcpumask*cpumask)

Force the irq affinity of a given irq

Parameters

unsignedintirq

Interrupt to set affinity

conststructcpumask*cpumask

cpumask

Description

Same as irq_set_affinity, but without checking the mask againstonline cpus.

Solely for low level cpu hotplug code, where we need to make percpu interrupts affine before the cpu becomes online.

intirq_set_affinity_notifier(unsignedintirq,structirq_affinity_notify*notify)

control notification of IRQ affinity changes

Parameters

unsignedintirq

Interrupt for which to enable/disable notification

structirq_affinity_notify*notify

Context for notification, orNULL to disablenotification. Function pointers must be initialised;the other fields will be initialised by this function.

Description

Must be called in process context. Notification may only be enabledafter the IRQ is allocated and must be disabled before the IRQ is freedusingfree_irq().

intirq_set_vcpu_affinity(unsignedintirq,void*vcpu_info)

Set vcpu affinity for the interrupt

Parameters

unsignedintirq

interrupt number to set affinity

void*vcpu_info

vCPU specific data or pointer to a percpu array of vCPUspecific data for percpu_devid interrupts

Description

This function uses the vCPU specific data to set the vCPU affinity foran irq. The vCPU specific data is passed from outside, such as KVM. Oneexample code path is as below: KVM -> IOMMU ->irq_set_vcpu_affinity().

voiddisable_irq_nosync(unsignedintirq)

disable an irq without waiting

Parameters

unsignedintirq

Interrupt to disable

Description

Disable the selected interrupt line. Disables and Enables arenested.Unlikedisable_irq(), this function does not ensure existinginstances of the IRQ handler have completed before returning.

This function may be called from IRQ context.

voiddisable_irq(unsignedintirq)

disable an irq and wait for completion

Parameters

unsignedintirq

Interrupt to disable

Description

Disable the selected interrupt line. Enables and Disables are nested.

This function waits for any pending IRQ handlers for this interrupt tocomplete before returning. If you use this function while holding aresource the IRQ handler may need you will deadlock.

Can only be called from preemptible code as it might sleep when aninterrupt thread is associated toirq.

booldisable_hardirq(unsignedintirq)

disables an irq and waits for hardirq completion

Parameters

unsignedintirq

Interrupt to disable

Description

Disable the selected interrupt line. Enables and Disables are nested.

This function waits for any pending hard IRQ handlers for this interruptto complete before returning. If you use this function while holding aresource the hard IRQ handler may need you will deadlock.

When used to optimistically disable an interrupt from atomic context thereturn value must be checked.

This function may be called - with care - from IRQ context.

Return

false if a threaded handler is active.

voiddisable_nmi_nosync(unsignedintirq)

disable an nmi without waiting

Parameters

unsignedintirq

Interrupt to disable

Description

Disable the selected interrupt line. Disables and enables are nested.

The interrupt to disable must have been requested through request_nmi.Unlikedisable_nmi(), this function does not ensure existinginstances of the IRQ handler have completed before returning.

voidenable_irq(unsignedintirq)

enable handling of an irq

Parameters

unsignedintirq

Interrupt to enable

Description

Undoes the effect of one call todisable_irq(). If this matches thelast disable, processing of interrupts on this IRQ line is re-enabled.

This function may be called from IRQ context only whendesc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !

voidenable_nmi(unsignedintirq)

enable handling of an nmi

Parameters

unsignedintirq

Interrupt to enable

Description

The interrupt to enable must have been requested through request_nmi.Undoes the effect of one call todisable_nmi(). If this matches the lastdisable, processing of interrupts on this IRQ line is re-enabled.

intirq_set_irq_wake(unsignedintirq,unsignedinton)

control irq power management wakeup

Parameters

unsignedintirq

interrupt to control

unsignedinton

enable/disable power management wakeup

Description

Enable/disable power management wakeup mode, which is disabled bydefault. Enables and disables must match, just as they match fornon-wakeup mode support.

Wakeup mode lets this IRQ wake the system from sleep states like“suspend to RAM”.

Note

irq enable/disable state is completely orthogonal to theenable/disable state of irq wake. An irq can be disabled withdisable_irq() and still wake the system as long as the irq has wakeenabled. If this does not hold, then the underlying irq chip and therelated driver need to be investigated.

voidirq_wake_thread(unsignedintirq,void*dev_id)

wake the irq thread for the action identified by dev_id

Parameters

unsignedintirq

Interrupt line

void*dev_id

Device identity for which the thread should be woken

constvoid*free_irq(unsignedintirq,void*dev_id)

free an interrupt allocated with request_irq

Parameters

unsignedintirq

Interrupt line to free

void*dev_id

Device identity to free

Description

Remove an interrupt handler. The handler is removed and if the interruptline is no longer in use by any driver it is disabled. On a shared IRQthe caller must ensure the interrupt is disabled on the card it drivesbefore calling this function. The function does not return until anyexecuting interrupts for this IRQ have completed.

This function must not be called from interrupt context.

Returns the devname argument passed to request_irq.

intrequest_threaded_irq(unsignedintirq,irq_handler_thandler,irq_handler_tthread_fn,unsignedlongirqflags,constchar*devname,void*dev_id)

allocate an interrupt line

Parameters

unsignedintirq

Interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.Primary handler for threaded interrupts.If handler is NULL and thread_fn != NULLthe default primary handler is installed.

irq_handler_tthread_fn

Function called from the irq handler threadIf NULL, no irq thread is created

unsignedlongirqflags

Interrupt type flags

constchar*devname

An ascii name for the claiming device

void*dev_id

A cookie passed back to the handler function

Description

This call allocates interrupt resources and enables the interrupt lineand IRQ handling. From the point this call is made your handler functionmay be invoked. Since your handler function must clear any interrupt theboard raises, you must take care both to initialise your hardware and toset up the interrupt handler in the right order.

If you want to set up a threaded irq handler for your device then youneed to supplyhandler andthread_fn.handler is still called in hardinterrupt context and has to check whether the interrupt originates fromthe device. If yes it needs to disable the interrupt on the device andreturn IRQ_WAKE_THREAD which will wake up the handler thread and runthread_fn. This split handler design is necessary to support sharedinterrupts.

dev_id must be globally unique. Normally the address of the device datastructure is used as the cookie. Since the handler receives this valueit makes sense to use it.

If your interrupt is shared you must pass a non NULL dev_id as this isrequired when freeing the interrupt.

Flags:

IRQF_SHARED Interrupt is sharedIRQF_TRIGGER_* Specify active edge(s) or levelIRQF_ONESHOT Run thread_fn with interrupt line masked

intrequest_any_context_irq(unsignedintirq,irq_handler_thandler,unsignedlongflags,constchar*name,void*dev_id)

allocate an interrupt line

Parameters

unsignedintirq

Interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.Threaded handler for threaded interrupts.

unsignedlongflags

Interrupt type flags

constchar*name

An ascii name for the claiming device

void*dev_id

A cookie passed back to the handler function

Description

This call allocates interrupt resources and enables the interrupt lineand IRQ handling. It selects either a hardirq or threaded handlingmethod depending on the context.

Return

On failure, it returns a negative value. On success, it returns eitherIRQC_IS_HARDIRQ or IRQC_IS_NESTED.

intrequest_nmi(unsignedintirq,irq_handler_thandler,unsignedlongirqflags,constchar*name,void*dev_id)

allocate an interrupt line for NMI delivery

Parameters

unsignedintirq

Interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.Threaded handler for threaded interrupts.

unsignedlongirqflags

Interrupt type flags

constchar*name

An ascii name for the claiming device

void*dev_id

A cookie passed back to the handler function

Description

This call allocates interrupt resources and enables the interrupt lineand IRQ handling. It sets up the IRQ line to be handled as an NMI.

An interrupt line delivering NMIs cannot be shared and IRQ handlingcannot be threaded.

Interrupt lines requested for NMI delivering must produce per cpuinterrupts and have auto enabling setting disabled.

dev_id must be globally unique. Normally the address of the device datastructure is used as the cookie. Since the handler receives this valueit makes sense to use it.

If the interrupt line cannot be used to deliver NMIs, function will failand return a negative value.

boolirq_percpu_is_enabled(unsignedintirq)

Check whether the per cpu irq is enabled

Parameters

unsignedintirq

Linux irq number to check for

Description

Must be called from a non migratable context. Returns the enablestate of a per cpu interrupt on the current cpu.

voidfree_percpu_irq(unsignedintirq,void__percpu*dev_id)

free an interrupt allocated with request_percpu_irq

Parameters

unsignedintirq

Interrupt line to free

void__percpu*dev_id

Device identity to free

Description

Remove a percpu interrupt handler. The handler is removed, but theinterrupt line is not disabled. This must be done on each CPU beforecalling this function. The function does not return until any executinginterrupts for this IRQ have completed.

This function must not be called from interrupt context.

intsetup_percpu_irq(unsignedintirq,structirqaction*act)

setup a per-cpu interrupt

Parameters

unsignedintirq

Interrupt line to setup

structirqaction*act

irqaction for the interrupt

Description

Used to statically setup per-cpu interrupts in the early boot process.

int__request_percpu_irq(unsignedintirq,irq_handler_thandler,unsignedlongflags,constchar*devname,constcpumask_t*affinity,void__percpu*dev_id)

allocate a percpu interrupt line

Parameters

unsignedintirq

Interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.

unsignedlongflags

Interrupt type flags (IRQF_TIMER only)

constchar*devname

An ascii name for the claiming device

constcpumask_t*affinity

A cpumask describing the target CPUs for this interrupt

void__percpu*dev_id

A percpu cookie passed back to the handler function

Description

This call allocates interrupt resources, but doesn’t enable the interrupton any CPU, as all percpu-devid interrupts are flagged with IRQ_NOAUTOEN.It has to be done on each CPU usingenable_percpu_irq().

dev_id must be globally unique. It is a per-cpu variable, andthe handler gets called with the interrupted CPU’s instance ofthat variable.

intrequest_percpu_nmi(unsignedintirq,irq_handler_thandler,constchar*name,conststructcpumask*affinity,void__percpu*dev_id)

allocate a percpu interrupt line for NMI delivery

Parameters

unsignedintirq

Interrupt line to allocate

irq_handler_thandler

Function to be called when the IRQ occurs.

constchar*name

An ascii name for the claiming device

conststructcpumask*affinity

A cpumask describing the target CPUs for this interrupt

void__percpu*dev_id

A percpu cookie passed back to the handler function

Description

This call allocates interrupt resources for a per CPU NMI. Per CPU NMIshave to be setup on each CPU by callingprepare_percpu_nmi() beforebeing enabled on the same CPU by usingenable_percpu_nmi().

dev_id must be globally unique. It is a per-cpu variable, and thehandler gets called with the interrupted CPU’s instance of thatvariable.

Interrupt lines requested for NMI delivering should have auto enablingsetting disabled.

If the interrupt line cannot be used to deliver NMIs, functionwill fail returning a negative value.

intprepare_percpu_nmi(unsignedintirq)

performs CPU local setup for NMI delivery

Parameters

unsignedintirq

Interrupt line to prepare for NMI delivery

Description

This call prepares an interrupt line to deliver NMI on the current CPU,before that interrupt line gets enabled withenable_percpu_nmi().

As a CPU local operation, this should be called from non-preemptiblecontext.

If the interrupt line cannot be used to deliver NMIs, function will failreturning a negative value.

voidteardown_percpu_nmi(unsignedintirq)

undoes NMI setup of IRQ line

Parameters

unsignedintirq

Interrupt line from which CPU local NMI configuration should be removed

Description

This call undoes the setup done byprepare_percpu_nmi().

IRQ line should not be enabled for the current CPU.As a CPU local operation, this should be called from non-preemptiblecontext.

intirq_get_irqchip_state(unsignedintirq,enumirqchip_irq_statewhich,bool*state)

returns the irqchip state of a interrupt.

Parameters

unsignedintirq

Interrupt line that is forwarded to a VM

enumirqchip_irq_statewhich

One of IRQCHIP_STATE_* the caller wants to know about

bool*state

a pointer to a boolean where the state is to be stored

Description

This call snapshots the internal irqchip state of an interrupt,returning intostate the bit corresponding to stagewhich

This function should be called with preemption disabled if the interruptcontroller has per-cpu registers.

intirq_set_irqchip_state(unsignedintirq,enumirqchip_irq_statewhich,boolval)

set the state of a forwarded interrupt.

Parameters

unsignedintirq

Interrupt line that is forwarded to a VM

enumirqchip_irq_statewhich

State to be restored (one of IRQCHIP_STATE_*)

boolval

Value corresponding towhich

Description

This call sets the internal irqchip state of an interrupt, depending onthe value ofwhich.

This function should be called with migration disabled if the interruptcontroller has per-cpu registers.

boolirq_has_action(unsignedintirq)

Check whether an interrupt is requested

Parameters

unsignedintirq

The linux irq number

Return

A snapshot of the current state

boolirq_check_status_bit(unsignedintirq,unsignedintbitmask)

Check whether bits in the irq descriptor status are set

Parameters

unsignedintirq

The linux irq number

unsignedintbitmask

The bitmask to evaluate

Return

True if one of the bits inbitmask is set

intirq_set_chip(unsignedintirq,conststructirq_chip*chip)

set the irq chip for an irq

Parameters

unsignedintirq

irq number

conststructirq_chip*chip

pointer to irq chip description structure

intirq_set_irq_type(unsignedintirq,unsignedinttype)

set the irq trigger type for an irq

Parameters

unsignedintirq

irq number

unsignedinttype

IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h

intirq_set_handler_data(unsignedintirq,void*data)

set irq handler data for an irq

Parameters

unsignedintirq

Interrupt number

void*data

Pointer to interrupt specific data

Description

Set the hardware irq controller data for an irq

intirq_set_chip_data(unsignedintirq,void*data)

set irq chip data for an irq

Parameters

unsignedintirq

Interrupt number

void*data

Pointer to chip specific data

Description

Set the hardware irq chip data for an irq

voidhandle_nested_irq(unsignedintirq)

Handle a nested irq from a irq thread

Parameters

unsignedintirq

the interrupt number

Description

Handle interrupts which are nested into a threaded interrupthandler. The handler function is called inside the calling threadscontext.

voidhandle_simple_irq(structirq_desc*desc)

Simple and software-decoded IRQs.

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Simple interrupts are either sent from a demultiplexing interrupthandler or come from hardware, where no interrupt hardware control isnecessary.

Note

The caller is expected to handle the ack, clear, mask and unmaskissues if necessary.

voidhandle_untracked_irq(structirq_desc*desc)

Simple and software-decoded IRQs.

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Untracked interrupts are sent from a demultiplexing interrupt handlerwhen the demultiplexer does not know which device it its multiplexed irqdomain generated the interrupt. IRQ’s handled through here are notsubjected to stats tracking, randomness, or spurious interruptdetection.

Note

Like handle_simple_irq, the caller is expected to handle the ack,clear, mask and unmask issues if necessary.

voidhandle_level_irq(structirq_desc*desc)

Level type irq handler

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Level type interrupts are active as long as the hardware line has theactive level. This may require to mask the interrupt and unmask it afterthe associated handler has acknowledged the device, so the interruptline is back to inactive.

voidhandle_fasteoi_irq(structirq_desc*desc)

irq handler for transparent controllers

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Only a single callback will be issued to the chip: an ->eoi() call whenthe interrupt has been serviced. This enables support for modern formsof interrupt handlers, which handle the flow details in hardware,transparently.

voidhandle_fasteoi_nmi(structirq_desc*desc)

irq handler for NMI interrupt lines

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

A simple NMI-safe handler, considering the restrictionsfrom request_nmi.

Only a single callback will be issued to the chip: an ->eoi()call when the interrupt has been serviced. This enables supportfor modern forms of interrupt handlers, which handle the flowdetails in hardware, transparently.

voidhandle_edge_irq(structirq_desc*desc)

edge type IRQ handler

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Interrupt occurs on the falling and/or rising edge of a hardwaresignal. The occurrence is latched into the irq controller hardware andmust be acked in order to be reenabled. After the ack another interruptcan happen on the same source even before the first one is handled bythe associated event handler. If this happens it might be necessary todisable (mask) the interrupt depending on the controller hardware. Thisrequires to reenable the interrupt inside of the loop which handles theinterrupts which have arrived while the handler was running. If allpending interrupts are handled, the loop is left.

voidhandle_fasteoi_ack_irq(structirq_desc*desc)

irq handler for edge hierarchy stacked on transparent controllers

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Likehandle_fasteoi_irq(), but for use with hierarchy where the irq_chipalso needs to have its ->irq_ack() function called.

voidhandle_fasteoi_mask_irq(structirq_desc*desc)

irq handler for level hierarchy stacked on transparent controllers

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Likehandle_fasteoi_irq(), but for use with hierarchy where the irq_chipalso needs to have its ->irq_mask_ack() function called.

intirq_chip_set_parent_state(structirq_data*data,enumirqchip_irq_statewhich,boolval)

set the state of a parent interrupt.

Parameters

structirq_data*data

Pointer to interrupt specific data

enumirqchip_irq_statewhich

State to be restored (one of IRQCHIP_STATE_*)

boolval

Value corresponding towhich

Description

Conditional success, if the underlying irqchip does not implement it.

intirq_chip_get_parent_state(structirq_data*data,enumirqchip_irq_statewhich,bool*state)

get the state of a parent interrupt.

Parameters

structirq_data*data

Pointer to interrupt specific data

enumirqchip_irq_statewhich

one of IRQCHIP_STATE_* the caller wants to know

bool*state

a pointer to a boolean where the state is to be stored

Description

Conditional success, if the underlying irqchip does not implement it.

voidirq_chip_shutdown_parent(structirq_data*data)

Shutdown the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

Description

Invokes theirq_shutdown() callback of the parent if available or fallsback toirq_chip_disable_parent().

unsignedintirq_chip_startup_parent(structirq_data*data)

Startup the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

Description

Invokes theirq_startup() callback of the parent if available or fallsback toirq_chip_enable_parent().

voidirq_chip_enable_parent(structirq_data*data)

Enable the parent interrupt (defaults to unmask if NULL)

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_disable_parent(structirq_data*data)

Disable the parent interrupt (defaults to mask if NULL)

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_ack_parent(structirq_data*data)

Acknowledge the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_mask_parent(structirq_data*data)

Mask the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_mask_ack_parent(structirq_data*data)

Mask and acknowledge the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_unmask_parent(structirq_data*data)

Unmask the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_eoi_parent(structirq_data*data)

Invoke EOI on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

intirq_chip_set_affinity_parent(structirq_data*data,conststructcpumask*dest,boolforce)

Set affinity on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

conststructcpumask*dest

The affinity mask to set

boolforce

Flag to enforce setting (disable online checks)

Description

Conditional, as the underlying parent chip might not implement it.

intirq_chip_set_type_parent(structirq_data*data,unsignedinttype)

Set IRQ type on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

unsignedinttype

IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h

Description

Conditional, as the underlying parent chip might not implement it.

intirq_chip_retrigger_hierarchy(structirq_data*data)

Retrigger an interrupt in hardware

Parameters

structirq_data*data

Pointer to interrupt specific data

Description

Iterate through the domain hierarchy of the interrupt and checkwhether a hw retrigger function exists. If yes, invoke it.

intirq_chip_set_vcpu_affinity_parent(structirq_data*data,void*vcpu_info)

Set vcpu affinity on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

void*vcpu_info

The vcpu affinity information

intirq_chip_set_wake_parent(structirq_data*data,unsignedinton)

Set/reset wake-up on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

unsignedinton

Whether to set or reset the wake-up capability of this irq

Description

Conditional, as the underlying parent chip might not implement it.

intirq_chip_request_resources_parent(structirq_data*data)

Request resources on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

voidirq_chip_release_resources_parent(structirq_data*data)

Release resources on the parent interrupt

Parameters

structirq_data*data

Pointer to interrupt specific data

Internal Functions Provided

This chapter contains the autogenerated documentation of the internalfunctions.

unsignedintirq_get_nr_irqs(void)

Number of interrupts supported by the system.

Parameters

void

no arguments

unsignedintirq_set_nr_irqs(unsignedintnr)

Set the number of interrupts supported by the system.

Parameters

unsignedintnr

New number of interrupts.

Return

nr.

intgeneric_handle_irq(unsignedintirq)

Invoke the handler for a particular irq

Parameters

unsignedintirq

The irq number to handle

Return

0 on success, or -EINVAL if conversion has failed

Description

This function must be called from an IRQ context with irq regsinitialized.

intgeneric_handle_irq_safe(unsignedintirq)

Invoke the handler for a particular irq from any context.

Parameters

unsignedintirq

The irq number to handle

Return

0 on success, a negative value on error.

Description

This function can be called from any context (IRQ or process context). Itwill report an error if not invoked from IRQ context and the irq has beenmarked to enforce IRQ-context only.

intgeneric_handle_domain_irq(structirq_domain*domain,irq_hw_number_thwirq)

Invoke the handler for a HW irq belonging to a domain.

Parameters

structirq_domain*domain

The domain where to perform the lookup

irq_hw_number_thwirq

The HW irq number to convert to a logical one

Return

0 on success, or -EINVAL if conversion has failed

Description

This function must be called from an IRQ context with irq regsinitialized.

intgeneric_handle_domain_nmi(structirq_domain*domain,irq_hw_number_thwirq)

Invoke the handler for a HW nmi belonging to a domain.

Parameters

structirq_domain*domain

The domain where to perform the lookup

irq_hw_number_thwirq

The HW irq number to convert to a logical one

Return

0 on success, or -EINVAL if conversion has failed

Description

This function must be called from an NMI context with irq regsinitialized.

voidirq_free_descs(unsignedintfrom,unsignedintcnt)

free irq descriptors

Parameters

unsignedintfrom

Start of descriptor range

unsignedintcnt

Number of consecutive irqs to free

int__ref__irq_alloc_descs(intirq,unsignedintfrom,unsignedintcnt,intnode,structmodule*owner,conststructirq_affinity_desc*affinity)

allocate and initialize a range of irq descriptors

Parameters

intirq

Allocate for specific irq number if irq >= 0

unsignedintfrom

Start the search from this irq number

unsignedintcnt

Number of consecutive irqs to allocate.

intnode

Preferred node on which the irq descriptor should be allocated

structmodule*owner

Owning module (can be NULL)

conststructirq_affinity_desc*affinity

Optional pointer to an affinity mask array of sizecnt whichhints where the irq descriptors should be allocated and whichdefault affinities to use

Description

Returns the first irq number or error code

unsignedintirq_get_next_irq(unsignedintoffset)

get next allocated irq number

Parameters

unsignedintoffset

where to start the search

Description

Returns next irq number after offset or nr_irqs if none is found.

unsignedintkstat_irqs_cpu(unsignedintirq,intcpu)

Get the statistics for an interrupt on a cpu

Parameters

unsignedintirq

The interrupt number

intcpu

The cpu number

Description

Returns the sum of interrupt counts oncpu since boot forirq. The caller must ensure that the interrupt is not removedconcurrently.

unsignedintkstat_irqs_usr(unsignedintirq)

Get the statistics for an interrupt from thread context

Parameters

unsignedintirq

The interrupt number

Description

Returns the sum of interrupt counts on all cpus since boot forirq.

It uses rcu to protect the access since a concurrent removal of aninterrupt descriptor is observing an rcu grace period beforedelayed_free_desc()/irq_kobj_release().

voidhandle_bad_irq(structirq_desc*desc)

handle spurious and unhandled irqs

Parameters

structirq_desc*desc

description of the interrupt

Description

Handles spurious and unhandled IRQ’s. It also prints a debugmessage.

voidnoinstrgeneric_handle_arch_irq(structpt_regs*regs)

root irq handler for architectures which do no entry accounting themselves

Parameters

structpt_regs*regs

Register file coming from the low-level handling code

intirq_set_msi_desc_off(unsignedintirq_base,unsignedintirq_offset,structmsi_desc*entry)

set MSI descriptor data for an irq at offset

Parameters

unsignedintirq_base

Interrupt number base

unsignedintirq_offset

Interrupt number offset

structmsi_desc*entry

Pointer to MSI descriptor data

Description

Set the MSI descriptor entry for an irq at offset

intirq_set_msi_desc(unsignedintirq,structmsi_desc*entry)

set MSI descriptor data for an irq

Parameters

unsignedintirq

Interrupt number

structmsi_desc*entry

Pointer to MSI descriptor data

Description

Set the MSI descriptor entry for an irq

voidirq_disable(structirq_desc*desc)

Mark interrupt disabled

Parameters

structirq_desc*desc

irq descriptor which should be disabled

Description

If the chip does not implement the irq_disable callback, weuse a lazy disable approach. That means we mark the interruptdisabled, but leave the hardware unmasked. That’s anoptimization because we avoid the hardware access for thecommon case where no interrupt happens after we marked itdisabled. If an interrupt happens, then the interrupt flowhandler masks the line at the hardware level and marks itpending.

If the interrupt chip does not implement the irq_disable callback,a driver can disable the lazy approach for a particular irq line bycalling ‘irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)’. This canbe used for devices which cannot disable the interrupt at thedevice level under certain circumstances and have to usedisable_irq[_nosync] instead.

voidhandle_percpu_irq(structirq_desc*desc)

Per CPU local irq handler

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Per CPU interrupts on SMP machines without locking requirements

voidhandle_percpu_devid_irq(structirq_desc*desc)

Per CPU local irq handler with per cpu dev ids

Parameters

structirq_desc*desc

the interrupt description structure for this irq

Description

Per CPU interrupts on SMP machines without locking requirements. Same ashandle_percpu_irq() above but with the following extras:

action->percpu_dev_id is a pointer to percpu variables whichcontain the real device id for the cpu on which this handler iscalled

voidirq_cpu_online(void)

Invoke all irq_cpu_online functions.

Parameters

void

no arguments

Description

Iterate through all irqs and invoke the chip.irq_cpu_online()for each.

voidirq_cpu_offline(void)

Invoke all irq_cpu_offline functions.

Parameters

void

no arguments

Description

Iterate through all irqs and invoke the chip.irq_cpu_offline()for each.

intirq_chip_compose_msi_msg(structirq_data*data,structmsi_msg*msg)

Compose msi message for a irq chip

Parameters

structirq_data*data

Pointer to interrupt specific data

structmsi_msg*msg

Pointer to the MSI message

Description

For hierarchical domains we find the first chip in the hierarchywhich implements the irq_compose_msi_msg callback. For nonhierarchical we use the top level chip.

intirq_chip_pm_get(structirq_data*data)

Enable power for an IRQ chip

Parameters

structirq_data*data

Pointer to interrupt specific data

Description

Enable the power to the IRQ chip referenced by the interrupt datastructure.

intirq_chip_pm_put(structirq_data*data)

Disable power for an IRQ chip

Parameters

structirq_data*data

Pointer to interrupt specific data

Description

Disable the power to the IRQ chip referenced by the interrupt datastructure, belongs. Note that power will only be disabled, once thisfunction has been called for all IRQs that have calledirq_chip_pm_get().

Credits

The following people have contributed to this document:

  1. Thomas Gleixnertglx@kernel.org

  2. Ingo Molnarmingo@elte.hu