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arxiv logo>cs> arXiv:2501.05667
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Computer Science > Machine Learning

arXiv:2501.05667 (cs)
[Submitted on 10 Jan 2025 (v1), last revised 26 Mar 2025 (this version, v2)]

Title:TransPlace: Transferable Circuit Global Placement via Graph Neural Network

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Abstract:Global placement, a critical step in designing the physical layout of computer chips, is essential to optimize chip performance. Prior global placement methods optimize each circuit design individually from scratch. Their neglect of transferable knowledge limits solution efficiency and chip performance as circuit complexity drastically increases. This study presents TransPlace, a global placement framework that learns to place millions of mixed-size cells in continuous space. TransPlace introduces i) Netlist Graph to efficiently model netlist topology, ii) Cell-flow and relative position encoding to learn SE(2)-invariant representation, iii) a tailored graph neural network architecture for informed parameterization of placement knowledge, and iv) a two-stage strategy for coarse-to-fine placement. Compared to state-of-the-art placement methods, TransPlace-trained on a few high-quality placements-can place unseen circuits with 1.2x speedup while reducing congestion by 30%, timing by 9%, and wirelength by 5%.
Comments:Accepted at KDD 2025
Subjects:Machine Learning (cs.LG); Artificial Intelligence (cs.AI); Hardware Architecture (cs.AR)
Cite as:arXiv:2501.05667 [cs.LG]
 (orarXiv:2501.05667v2 [cs.LG] for this version)
 https://doi.org/10.48550/arXiv.2501.05667
arXiv-issued DOI via DataCite

Submission history

From: Yunbo Hou [view email]
[v1] Fri, 10 Jan 2025 02:33:15 UTC (2,384 KB)
[v2] Wed, 26 Mar 2025 03:19:11 UTC (2,440 KB)
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